4. ANÁLISIS Y DISCUSIÓN DE RESULTADOS
4.3 Interpretación de Resultados
4.3.2 Interpretación de los resultados de la Observación
5.2.1 Gate Oxide Breakdown
Gate oxide isolates the gate of a MOSFET from the other terminals.
According to a gate oxide breakdown model a discharge will take place though the oxide when the cumulative number of generated traps (generated during leakage of current through the oxide) is enough to form a chain from one side of the capacitor to the other.
considerable amount of damage (example shown in Figure 8), which typically leads to a short circuit through the capacitor.
The capacitor energy (½CV2) is released through this chain, causing a
Figure 8. Schematic cross section of a transistor with a gate oxide breakdown, plus a backside planar SEM-view of a broken down gate oxide (black hole in circle). Source and Drain are
indicated as well
5.2.2 Hot Carrier Degradation
Charge carriers in a transistor can be accelerated so that collisions with the lattice lead to injection of charge in the insulating gate oxide. This leads to progressive degradation of the transistor performance as seen in a ring oscillator, which runs at a high voltage to accelerate the degradation process.
Process optimisation and design rules together are needed to assure hot carrier reliability.
Figure 9. Example of hot carrier induced ring oscillator frequency degradation 5.2.3 ESD (Electro-Static Discharge)
An integrated circuit is very vulnerable when voltage exceeds its supply voltage. In Figure 10 the damage effect of a lethal ESD pulse is shown, where the energy of the ESD pulse causes a melted region between source and drain of a transistor.
Figure 10.Top view of a molten and re-solidified result of an ESD event in a transistor
5.2.4 Electromigration
Between transistors, there are metal lines conducting the current. This current can induce electromigration: migration of metal atoms in the direction of “electron wind”. The ‘holes’ might appear in the metal, causing resistance increases, and possible even open connections. Both effects may cause an IC to stop functioning according to its specifications. An example is shown in Figure 11, in which two metal lines are connected with a tungsten plug. Tungsten is a very hard metal and does not migrate, but immediately behind the tungsten, the plug aluminium can migrate away, leaving a hole.
Holes in metal can also be formed without applying a current. This is called stress voiding. Due to the difference in coefficients of thermal expansion of metal and glass (the oxide between the metal lines) the metal is usually in a tensile condition, which may lead to atom migration.
Figure 11. Cross section of two metal layers and a tungsten plug after an electromigration 5.2.5 Die Crack
Surface scratching and cracks in dies may form in packaging processes, such as die scribing, dicing, and/or die-attach stages. If an initial flaw equals to or greater than the critical crack size exist, the die can catastrophically fracture in a brittle manner. For instance, surface cracks due to chemical-mechanical polishing may propagate throughout the complete die during temperature cycling testing. Die fractures may run in vertical direction but also horizontally. Figure 12 illustrates an example of vertical die crack in a HBGA package. In most cases, die crack originates from flaws on the backside due to back grinding operations for wafer thinning.
Figure 12. Example of horizontal die cracking in a HBGA package
5.2.6 Wire Sweep
Wire sweep denotes visible wire deformations, typically an in-plane movement in the direction of mould flow through the cavity. Under this deformation, ball bonds can kink at the connection point as the wire is pulled at during moulding. A consequence of wire sweep is device shortening and/or current leakage. Failures may occur immediately after moulding, but in some cases also after subsequent stress testing. Wire sweep can occur from a number of causes: high resign viscosity, high flow velocity, unbalanced flow in the cavity, void transport, and filler collisions. Figure 13 illustrates an example of wire sweep.
Figure 13. Example of wire sweep problems
5.2.7 Interface Delamination
Interface delamination between two adjacent materials is one of the major problems in packaging industry. One of most common delaminated interface is the one between epoxy and metal materials. Moisture ingress, either through the bulk epoxy or along the interface can accelerate delamination in plastic packages. The adhesion is also degraded by improper
Figure 14. Delamination between leadframe and compound
6. CONCLUSIONS
There are many mechanisms that ultimately can and will cause failures of IC’s. There are extensive mathematical toolboxes available to describe fails and fail distributions. During process development (both wafer fab process as well as packaging process), reliability of products can be built in by generating knowledge based design rules that address each individual failure mechanism. The rest of book will address some of important failure mechanisms associated with mechanics failures.
assembly processes, for example by oxidation and/or contamination, delami-moisture at interfaces generates vapour pressures, which will be the driving force for the micro-cracks to propagate. Delamination is the root cause for many other types of failures during subsequent temperature cycle testing.
So-called Surface Acoustic Measurements (SAM) can identify delamination.
Figure 14 illustrates delamination between leadframe and moulding com-pound.
nation and micro-cracks introduced at the interfaces. During reflow conditions,
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