The system initialization is carried out with current hysteresis control discussed in Section 6.1. The simulation study is carried out to verify the current tracking ability and the accuracy of the grid voltage estimation. Also, different a.c. side topology e.g. three-phase three-wire or three- phase four-wire system is simulated to verify the filter design and system response in different environments.
The three-phase four-wire a.c. topology is first used to verify the performance using simulation. The coupling inductance is 10mH. The average switching frequency should not exceed a limit of 10kHz. The sampling frequency is set to be 20kHz which would be the same sampling frequency applied later in the experiments. d.c. voltage is set to be 413V for achieving a modulation depth of 0.8 assuming the a.c. side is a 230V grid system. Guided by the design procedure provided in Section 6.3.2, the small hysteresis band is set to be ±0.2A.
The purpose of deploying the initial start-up procedure is to ride-through the initial current transient prior to synchronising to the grid voltage. The VSI system could be started with phase error between the referenced voltage output and the desired one. The initial start-up procedure should be able to control the current within a safety range of the power modules even if this error is the worst case i.e. 180 degrees. The power should be controlled simultaneously according to an estimated grid voltage. A simulation is carried out to verify the performance of the design especially the accuracy and speed of the grid voltage estimation which is most important to the success of the rest of the control stage.
The parameters of the system under study is listed in Table 7.1:
Parameters Values
Grid voltage 230V (RMS)
Coupling inductance 10mH
Series resistance 0.1
D.c. link voltage 800V
Hysteresis band 0.2A
Power reference 2000W
Sampling frequency 20kHz
Table 7.1 Parameters of the system under study
The current output waveform and is shown in the figure below. The current ripples are controlled within the designed range to ensure that the harmonic injection is below the limit. The system starts without observable current overshoot. However, a small transient response is found when the PLL system is activated. This is due to the initial angle of the PLL system
being very different from the actual angle of the grid voltage. This effect can be reduced by feed-forward the angle estimated before the PLL system kicks in. The initial grid frequency is assumed to be 50 Hz at the time point when the system simulation is started. The PLL system is activated to adjust the feed-forward term of the grid frequency. It is worth mentioning that the PLL system here is not activated for power control purpose as during the start-up, the desired output power is guaranteed by the current reference generated using calculation matrix derived from the instantaneous power theory. But if the grid frequency varies, the dq components of the grid voltage become sinusoidal. This would introduce error to the voltage estimation because of insufficient bandwidth of the PI controller involved in the algorithm. In this case, the PLL system becomes necessary. It can be seen in the simulation result that the current reference Idrefis negative due to the phase error being 180 degrees. After the activation
of the PLL, the d-axis is aligned with the estimated grid voltage. The current reference becomes grid voltage oriented thus it jumps from negative to positive value. It is also essential to synchronise the PLL system during the start-up process to minimise the transient response when the current control mode is switched to dq decoupled current control.
To evaluate the impact brought to the system when activating the SRF-PLL system, an extended analysis is provided here from d.c. bus capacitor voltage point of view. The mismatch of the input and output energy across the d.c. capacitor will be the error between the output power and its reference, which is generated according to the input power, integrated by time. This energy variation is calculated to be approximately 8.7J (the accuracy is affected by the switching harmonics and definition of the steady state) causing the d.c. bus voltage variation of 3.2V if using the value of the capacitance of the experimental test rig. The impact on the d.c. link capacitor will be very small. As introduced in Section 6.2, the a.c. side power output needs to be controlled to balance the power generated from the generator side prior to synchronisation to the grid as one of the important control objectives during the initial start-up of the a.c. voltage-sensor-less system. The simulation results proved that this design objective is well satisfied as shown in Figure 7.8. As for the current overshoot, it is well below the limit of the IGBT rating and the duration is very short.
Figure 7.8 Power output during the initial synchronisation process
It can be verified from Figure 7.9, that with estimated voltage shown in Figure 7.10, the current reference can be generated to achieve unity power factor in less than a quarter of a fundamental
cycle and the reference output power can be reached. The effectiveness of the low-passing characteristic of the grid voltage estimation is obvious in Figure 7.11. The estimated grid voltage waveform is almost ripple free and exactly matches the actual grid voltage. This ensures the quality of the control especially when the current control mode is switched from hysteresis current control to dq decoupled current control as the error of the feed-forward grid voltage is not desirable.
Figure 7.9 Current reference during the initial start-up
Figure 7.11 The estimated grid voltage waveform
An FFT is carried out using Matlab to verify the actual switching frequency during the hysteresis control, as shown in Figure 7.12. The spectrum shows that the highest peaks are located around 9kHz which indicates the possible average switching frequency. This proves that the hysteresis-band is well designed to regulate the switching frequency within the permitted range. The THD is also complied with the requirement of the grid code as illustrated in Section 1.3. However, the harmonic content is barely below the permitted range. This is the most important reason why the current control mode needs to be switched from hysteresis current control to the proposed a.c. voltage-sensor-less current control with PWM to generate the gate signals.
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