The proposed CCSC has been tested experimentally by implementing a scaled-down model. The experimental results also show the effects of the suppression control of the circu- lating current in a single-phase model. Figure 38 shows the system setups of the experiment design. The central control unit is the DE0-NANO FPGA using EE4CE22F17C6N chip from Altera. It reads the sensor signals from AD215AY isolation amplifier which are connected in parallel with the MMC to monitor the capacitor voltages. The gate signals are generated in- side the FPGA and propagated to the MMC via gate drive circuits. The upper and lower arm currents and the circulating currents before and after applying the CCSC are shown in Figure 54. The AC components in the circulating current are suppressed after the control is enabled. The major part of the AC circulating current is eliminated by the control, the DC component in the circulating current remains. The FFT analysis in Figure 57 also shows that the harmon- ics present in the circulating current at twice the fundamental frequency has been suppressed. The upper and lower arm currents are shown in Figure 54 (b). Before applying the CCSC, the upper arm current consists of the positive half of the output current while the lower arm cur- rent forms the negative half of the output current as in (6) and (7).
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(b) upper/lower arm currents and the circulating current
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(d) lower arm capacitor voltages
Figure 54 The experiment results of the single phase MMC model, the CCSC is initially disa- bled and enabled again later.
After applying CCSC, both upper and lower arm currents have been changed from two halves into two complete sinusoidal waveforms. The peak values of both upper and lower arm currents are lower compared to the peak values before applying the CCSC because of the eliminations of the AC components in the circulating current, and the variations of the upper and lower arm currents are also slower, therefore, reducing the stresses of the switching com- ponents and lowering the harmonics generated in the converter output voltage.
The harmonic analysis of the output voltage is shown in Figure 55. The major parts of the THD exist at the carrier frequency, which is at 3 kHz. The THD of the output voltage before applying the CCSC is 27.47%, and it is reduced down to 24.11% i.e. 3.36% when the circulat- ing current is suppressed. Compared with the simulation results shown in Figure 48, they both reduce the THD of the output voltage due to the suppressed circulating current. By eliminat- ing the AC components in the circulating currents, the unnecessary currents flowing into the capacitor inside each submodule is reduced as well. Therefore, the voltage patterns are
smoother as shown in Figure 46, Figure 50, Figure 51, Figure 54 and Figure 56, leading to the THD reduction of the output voltage.
The upper arm capacitor voltages are also shown in Figure 54 (c), the voltage differences among those capacitors can be observed before applying the CCSC. One of the reasons caus-
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ing circulating current is the voltage differences among each arm. By the time the AC compo- nents of the circulating current have been eliminated, the voltage differences among the ca- pacitors are actively reduced. The increment of the peak values is observed as well in the sim- ulation results in Figure 47. According to ( 53 ) and ( 54 ), the 𝑉𝑑𝑖𝑓𝑓∗ term inserted into the ref-
erence signals is causing the changes of the inner voltages of the upper and lower arms. By increasing the proportional gain of the feedback controller shown in Figure 46, the upper and lower arm capacitor voltages gains are observed.
Figure 55 The FFT analysis of the output voltage before/after the CCSC has been enabled. The modulation index was changed from 0.95 to 0.5 in Figure 56. The changes of the mod- ulation index leads to the decrease of the output voltage, which results in the output power de- creasing when connected to passive loads. According to ( 55 ) the power transmitted is bal- anced between the AC side and the DC side, the power dropping on the AC side leads to the current decreasing on the DC side, and when the DC voltage remains the same. As a result, the amplitudes of the upper and lower arm currents are also lower when the modulation index was reduced. Additionally the circulating current is lower as the transmitted power is reduced.
The output voltage, shown in Figure 56 (a)has reduced peak values since the modulation index has changed from 0.95 to 0.5. The voltage differences among the upper/lower arm ca- pacitors shown in Figure 56 (c) and (d) are similar when modulation index changes. The peak values of the upper and lower arm capacitor voltages are lower, which is indicating the re- duced power output. The variations of the capacitor voltage are also reduced because of the
0% 5% 10% 15% 20% 25% 30% 0.0 0.2 0.3 0.5 0.6 0.8 0.9 1.1 1.2 1.4 1.5 1.7 1.8 2.0 2.1 2.3 2.4 2.6 2.7 2.9 3.0 3.2 3.3 3.5 3.6 3.8 3.9 Ma g n itu d e Frequency (kHz) CCSC Disabled, THD=27.47% CCSC Enabled, THD=24.11%
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smaller currents flowing into each submodule, which also results in the smoothing of the ca- pacitor voltages. The upper and lower arm currents are also lower when the modulation index changed. As stated in ( 53 ) and ( 54 ), the energy stored in the submodules is provided by the DC component of the circulating current. The lower reference signal leads to the reduced power output. Therefore, the suppressed circulating current shown in Figure 56 (b) has a lower value after the change. As expected, the harmonic analysis shown in Figure 57 indicates that the proposed CCSC can eliminate the second order harmonics, but will generate a small harmonic component around the carrier frequency. It is observed that, when the modulation index is at 0.5, the harmonics at the 3.3 kHz carrier frequency, is as high as 6.5%. However, the second order harmonics have been suppressed when the CCSC is activated in the experi- ment. The initial value of the second order harmonics was as high as 96%. After the control has been activated, it fell to 13.1% and 7.8% in regard to 0.95 MI and 0.5 MI respectively.
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(b) upper/lower arm currents and the circulating current
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(d) lower arm capacitor voltages
Figure 56 The experiment results of the single-phase MMC model where the MI is initially set at 0.95 and later was changed to 0.5.
Figure 57 the FFT analysis of the circulating current (a) before the CCSC has applied (b) after the CCSC has applied and MI= 1 (c) after the CCSC has applied and MI=0.5
5.6 Conclusion
The simplified CCSC method has been proposed and experimentally tested. The simulation
0% 5% 10% 15% 20% 25% 30% 0 .0 0.2 0.3 0.5 0.6 0.8 .90 1.1 1.2 1.4 1.5 1.7 1.8 .02 2.1 2.3 2.4 2.6 2.7 2.9 3.0 3.2 3.3 3.5 3.6 3.8 3.9 M ag n it u d e Frequency (kHz) CCSC Disabled, MI=0.95 CCSC Enabled, MI=0.95 CCSC Enabled, MI=0.5
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and experimental results have shown the feasibility and the controllability of this approach. This CCSC is based on power balancing through the DC and AC sides of the converter. The scheme removes the need for the PR controller tuning at a higher frequency than the funda- mental frequency to get a fast system response. The reference signals for circulating current control were deduced from the power transmitted through the converter. Therefore, it would easily adapt to the existing control system without adding more components. The FFT analy- sis indicates that the proposed CCSC can suppress the second-order harmonics of the circulat- ing current. The AC components at twice the fundamental frequency have been eliminated, but the harmonics of the carrier frequency are observed due to the control effects. Further im- proved CCSC control or the use of a feedback loop can be designed to reduce the second or- der harmonics without generating the carrier frequency harmonics.
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