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Energy Aware Signal Integrity Analysis for High Speed PCB Links

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Fig. 1. Schematic of a PCB link (drawings are not to scale). (a) Side view of the overall interconnect system consisting of the integrated circuits (ICs), packages, sockets, and PCB
Fig. 3. (a) Top view and (b) cross section of a simple test link to demonstrate the impact of ground vias on SI and link input power
Fig. 6. Evaluation of one channel of the PCB link in Fig. 3 (interconnect characteristic impedance close to 50 Ω) for different termination scenarios
Fig. 10. Comparison between S-parameters from measurement and physics- physics-based models for (a) differential transmission between port 2 and port 1 and (b) differential far-end crosstalk (FEXT) between port 4 and port 1 [location of differential ports
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