Two additional fault cases are given at Appendix A. These include a P2P fault on a link connected to the switching busbar 12 (link 412) and a P2Gnd fault on a bipole dc link (link 12). These fault cases lead to new conclusions that are briefly presented in this subsection.
In the P2P fault case, dc relays 512 and 513 incorrectly discriminate the dc fault as internal. DCCBs 512 and 513 receive an opening order due to decision making of the CRCC criterion. Then, these DCCBs receive a reclosing order due to the voltage recovery criterion.
In the P2Gnd fault case at a bipole dc link, an overvoltage shift does not appear on the dc links. Therefore, overvoltage suppression operations are not required. In addition, only the
7.4 Summary 141 (a) (b) (c) -1.5 -1 -0.5 0 0.5 1 1.5 0 20 40 60 80 100 120 140
IpConv4 IpConv6 IpConv7 IpConv8
T [ms] DC Cur ren t [pu ] -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0 20 40 60 80 100 120 140 VpConv4 VpConv6 VpConv7 VpConv8 T [ms] DC Vo lt age [pu ] -1 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 0 20 40 60 80 100 120 140 VnConv4 VnConv6 VnConv7 VnConv8 T [ms] DC Vo lt age [pu ]
Fig. 7.17 Profile of (a) converter dc currents, (b) positive pole dc voltages and (c) negative pole dc voltages.
faulted pole of the faulted link is isolated. Therefore, the faulty link remains with 50% of transmission capacity available. This constitutes a main advantage of bipole configurations.
7.4
Summary
A protection strategy for MTDC grids equipped with DCCB was proposed in this chapter. The strategy is initiated with fault detection which leads to: (a) converter blocking, (b) fault discrimination, and (c) overvoltage and voltage imbalance operation, if necessary.
Converter blocking is required for self-protection of sensitive power electronics devices such as IGBTs and to interrupt the submodule’s capacitive discharge to the dc fault. Fault discrimination leads fault clearance and isolation by appropriately ordering the opening of DCCBs classified as internal to the faulty link. The algorithms that lead to DCCB
classification are based on the sign of current derivative and CRCC criterion (introduced at Section 4.3). The combination of these algorithms supports a minimum-tripping protection strategy where typically only the DCCBs placed in the faulty link open. These algorithms are based on local measurements of dc current only which means that decision making is achieved in a timely manner. Lastly, overvoltage suppression is based on a discharging circuit that employs a limiting resistor and a low rating DCCB. This methodology is applied in the event of a P2Gnd fault on a monopole grid. Such a fault causes a voltage shift and overvoltage in one pole. Thus, the overvoltage should be quickly removed to avoid stress to the insulation of links. The discharge current is up to 1 kA which leads to the design of a low rating discharging DCCB. The overvoltage is suppressed in a few tens of milliseconds. This operation occurs in parallel with fault isolation and power restoration.
Simulation results describe the events for two fault cases that occur in the CIGRE 11-terminal dc system. This is a complex dc network that includes cables, OHLs, links composed of both cable and OHL sections, monopole converters, bipole converters and dc-dc transformers. Results show that typically only the DCCBs in the faulty link receive an opening order. This rate of success meets the requirements of the minimum-tripping protection philosophy. The protection strategy is robust to grid configuration, link type, dc fault type, and impedance (as long fault detection is achieved).
Chapter 8
Conclusions and Future Work
8.1
General Conclusions
DC protection is a major technical challenge in HVDC transmission systems. This thesis investigated protection algorithms and protection strategies for MTDC grids equipped with several fault clearance devices. The main contributions of this thesis include the CRCC fault discrimination algorithm, dc protection strategy for grids equipped with either ACCBs, FB converters or DCCBs, and overvoltage suppression algorithms for grids equipped with either ACCBs, FB converters or DCCBs.
8.1.1
Fault Discrimination Algorithms
This thesis was initiated with the objective to find discrimination algorithms for complex dc grids such as the 4-terminal and the CIGRE 11-terminal dc grid (described in Section 3.2 and 3.3). To meet this objective, a novel approach for the design of dc discrimination algorithms becomes necessary. Accordingly, this work focused on identifying patterns of dc fault currents that could be considered to design discrimination algorithms. The magnitude of the fault current should not be considered as it is very dependent on fault impedance, location and link type. Therefore, the research resulted in the development of the novel fault discrimination algorithm CRCC. This algorithm is based on the profile of transient waves generated after a dc fault and blocking of converters. The CRCC algorithm differs from
algorithms in the open literature in the way that, the magnitude of transient waves, or time difference between consecutive waves is not required.
With the CRCC discrimination algorithm, the faulty link is typically correctly identified within 2 ms. Therefore, the CRCC has an advantage against (a) link communication-based algorithms and (b) algorithms based on current/voltage derivative functions. The algorithms in (a) have an intrinsic link communication delay that might not be accepted for the protection of dc links. The algorithms in (b) are typically suitable for grids composed of dc cables and with large ratings of link end inductors. Therefore, their application is restricted in grids with OHLs and for grids where link end inductors may not be required (such as grids equipped with FB converter). On the other hand, the CRCC algorithm has been tested for a number of faults in cables, OHLs, low ratings of link end inductors, different impedances and locations. As a result, this thesis contributed with a fast dc fault discriminative algorithm that proved to be robust in many fault scenarios.