• No se han encontrado resultados

CAPITULO SEGUNDO. DE LOS CIUDADANOS DEL ESTADO

The problem of fault location in power networks has been seriously reconsidered with the development of active distribution and MTDC-HVDC networks.

This thesis proposes a new concept for the fault location in AC/DC systems and its deployment in chip-scale real-time simulation hardware realized by FPGAs. The development of the proposed fault location platform is done in two steps. First, an original fault location method based on the Electromagnetic Time Reversal (EMTR) theory is proposed. The proposed method is validated for the case of various power networks topologies and a comprehensive assessment of its performances is also carried out. Then, a new automated FPGA-based RTS is proposed. The developed FPGA-RTS is able to simulate EMT phenomena taking place in power converters and travelling wave propagation in power grids within very small simulation time steps. In what follows, a summary of the studies that have been accomplished to develop the proposed fault location platform is presented.

6.1.1 Fault Location in Power Networks Based on EMTR Theory

Chapter 2 of the thesis presented the principles and the validation of a novel fault location method for power networks. First, the chapter summarized the Time Reversal (TR) focusing process by explaining the time reversal cavity and time reversal mirror concepts. Next, the application of the TR theory to Maxwell’s equations in general, and to telegraphers’ equations in particular, was illustrated. By taking advantage of the time reversal invariance of the telegraphers’ equations, an original and efficient fault location method for power networks was presented.

6

6 CConclusions

156

Using transmission line equations in the frequency domain, analytical expressions were derived in order to infer the location of the fault. A time-domain implementation of the EMTR-based fault location technique was also proposed. As the telegraphers’ equations are invariant under a time-reversal transformation only for lossless lines, the impact of the losses on the performance of the proposed fault location method was also discussed. Three different models of back- propagation to address the issue of losses were considered: (i) inverted-loss, (ii) lossless, and (iii) lossy models. It has been shown through a numerical example related to a single-wire line above a conducting ground that, as expected, an inverted-loss model for the back-propagation results in a perfect estimation of the fault location. However, it is shown that, a back-propagation model in which the losses are included results also in a perfect estimation of the fault location, even though in this case the telegrapher’s equations are not strictly time-reversal invariant.

The proposed method was validated by means of reduced scale experiments considering two topologies. In both cases, the proposed EMTR-based approach was able to correctly identify the location. Furthermore, several validation examples were performed by making reference to different types of power networks including (i) inhomogeneous network composed of mixed overhead- coaxial cable lines, (ii) radial distribution network, (iii) series-compensated transmission line. The resulting fault location accuracy and robustness against uncertainties (e.g., fault impedance, fault type, network topology) was tested and, in this respect, the proposed method appears to be very promising for real applications.

The main advantages of the proposed method, compared to the existing ones, are as following:

x The method is straightforwardly applicable to inhomogeneous media that, in our case, are represented by mixed overhead and coaxial cable lines. x It is based on single-end measurement and requires the measurement of the

fault-originated voltage/current transient signals only at one observation point in the network. Therefore, it does not need complex communication links and synchronization between multiple observation points.

x Its performances are not influenced by the topology of the system, fault type and impedance, presence of series compensation, and presence of measurement noise.

157

66.1.2 Efficient EMT Simulations Based on FAMNM

One of the common simulation approaches adopted by the existing FPGA-RTSs is the ADC model to represent the switches. This particular model allows the definition of a fixed nodal admittance matrix irrespective of the switch states, and acceleration of the simulation process by avoiding the matrix manipulations associated with each switch states. Therefore, the nodal admittance matrix is defined a-priori, inversed and used by the FPGA solver. Nevertheless, from the accuracy point of view, such simulation technique introduces artificial transients and errors in the simulation results. In Chapter 3, it is shown that the value of the conductance associated with the ADC model can dramatically impact the simulation results accuracy. The existing FPGA-RTSs do not take into account the impact of the ADC model on the accuracy of the simulated results, and the value of the ADC conductance is selected without quantitative error assessments.

In Chapter 3 of the thesis, a novel method for the optimal assessment of the ADC model parameter was presented. The proposed method is based on the minimization of the Euclidian distance between the eigenvalues of the network admittance matrix based on FAMNM, and those associated with the admittance matrices of reference networks corresponding to the all possible switching permutations. To prove the correctness of the proposed method, a comparison between the proposed metric and specific defined error functions was presented and discussed.

The proposed method was validated by making reference to several validation examples including RLC circuits composed of single or two switches, networks including transmission lines, single-phase inverter, and two-level three-phase inverter. The proposed method was proven to be correct in identifying the optimal conductance of the discrete-time switch model. The results of the proposed method minimizes: (i) the differences with reference-model current/voltage waveforms, and (ii) losses in the discrete-time switch conductance.

6.1.3 Automated FPGA-RTS for Power Electronics and Power Systems

EMTs Simulations

In Chapter 4 of this thesis, an automated FPGA-based RTS for power electronics and power systems applications was presented. The proposed FPGA-RTS is implemented in an industrial real-time embedded system and has the following features: (i) it makes use of the MANA method, (ii) it integrates the FAMNM together with the optimal selection of the switch conductance parameter, (iii) it uses an efficient sparse matrix to vector multiplier which improves which improves the efficiency while significantly decreasing the FPGA hardware usage, (iv) it enables the possibility to accurately reproduce electromagnetic switching

158

transients taking place in power electronic switching devices together with electromagnetic waves propagation in transmission lines, and (v) it enables to reach extremely low integration time steps and provides an automated procedure to directly translate the schematic representation of the electrical circuits designed in EMTP-RV to the relevant FPGA solver.

Three validation examples were considered. They refer to (i) a two-level three- phase inverter, (ii) a multi-terminal HVDC network, and (iii) three-phase AC network. The comparison of the obtained results with respect to offline benchmark ones and the HIL validation showed an excellent agreement together with high computation efficiency. The proposed FPGA RTS exhibits remarkable performance in terms of the achieved simulation time step and the accuracy of the simulation results.

66.1.4 FPGA-Based Fault Location Platform Based on the EMTR

An original fault location platform was proposed in Chapter 5. The platform is developed by integrating the EMTR-based fault location method presented in Chapter 2 and the FPGA-RTS presented in Chapter 4. The developed platform takes advantage of the fast EMT simulation capability of the proposed FPGA-RTS to perform the fault location process within short computation time. The developed fault location system was validated by making reference to two applications: (i) an MTDC-HVDC network and (ii) an ADN.

For the case of MTDC network, the platform is developed such that it is compatible with the constraints associated with the time scales required by these grids protections. By taking advantage of specific peculiarities of the time reversal theory for closed reflecting media, the application of the proposed EMTR fault location method was adapted using a limited time reversal window for the measured fault-originated transient signals. The performances of the developed platform were analyzed by considering the substantial factors might impact the fault location accuracy. It was shown that the developed system is able to identify the correct fault location and exhibit excellent robustness against uncertainties such as noise, measurement delays and fault impedance.

The developed platform was also applied for the case of an ADN where the process is performed by using a single-end measurement system located at the primary substation. The performances of the platform were assessed by considering numerous fault cases with different fault types at different locations along the line. It was shown that estimated fault locations match with the real ones and the fault location accuracy was not affected by the type of the fault, the presence of the noise, measurement systems delay, and fault impedance.

159