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By design, CMOS VLSI is best suited for processing digital data. Adding process steps and device architectures to the CMOS baseline flowchart can create extra functionality created on top of standard features. A convenient way of categorizing these non-CMOS options is to group them by application domain to reflect the specific requirements from the overall system environment. The grouping that will be used here is memory, analog, radio-frequency (RF), passive integration, high-voltage/power, and sensors and actuators; the last group includes MEMS.

Each of these domains has specific requirements, which is reflected in specific non-CMOS technology solutions on wafer process and packaging level. Full CMOS functionality can almost always be maintained while implementing non-CMOS process features. This way of working is referred to as embedded process options; it comes at the price of adding mask steps and other complexity to the baseline process. If only limited CMOS capability is required, the flowchart can usually be simplified considerably.

This results in a stand-alone process option meant to be combined with other off-chip functionalities and data processing, meaning elsewhere on a PCB or in a SiP.

By volume, the largest option domain is memory, most of it coming as stand-alone, a significant portion also as embedded in baseline CMOS.

Storing and retrieving digital data requires a significant amount of peripheral circuit overhead to take of that also has to take care of clock, refresh and interface controls as well as redundancy management needed for error correction. Therefore, memory technology requirements stay close to CMOS and the evolution of the underlying processes closely follows Moore’s Law.

Requirements for the other domains are much less, up to not at all, determined by digital data considerations. These other options fall in the category ‘More than Moore’; they either do not evolve in line with Moore’s Law or follow with time delay of many years.

3.1 Memory

To store digital data one does not need special wafer processing. Six transistors in CMOS technology in a circuit known as an SRAM (Static Random Access Memory) cell are all that is needed [6]. An additional advantage of this type of memory, in fact a special version of a flip-flop, is that it needs very little periphery. Unfortunately, the SRAM cell is also the largest by far of all memories, though some efficiency can be gained in a stand-alone solution by trimming the technology down.

DRAM (dynamic random access memory) is much more compact than SRAM, its basic cell being just a capacitor and a transistor in series. As DRAM requires a lot of peripheral circuitry, it is mostly applied as stand alone feature. Stand-alone DRAM has the capacitor built into the substrate in the form of a very deep trench or pinhole, with the perimeter and a center plug functioning as electrodes. DRAM can also be embedded in a CMOS baseline, though not at the same high density as stand-alone. Reason for that is that the capacitor now has to be realized above transistor level to not interfere with the CMOS baseline transistors environment.

SRAM and DRAM are volatile, that is, they lose their information if disconnected from their supply voltage. Non-volatile memories in use today are EEPROM (electrically erasable programmable read-only memory), which is based on pushing charge to and from a floating gate through a semi-isolating (tunneling) oxide, and FRAM (ferro-electric) and MRAM (magnetoresistive), where the electrical resistance of ferromagnetic islands in different magnetic orientations determines the bit position. Also these memories require a fait amount of peripheral overhead, though not as much as DRAM. The EEPROM read-write cycle requires relatively high voltages to overcome the energy barrier for tunneling, FRAM and MRAM require a high to very high current to be able to switch the magnetic orientation of the bit cell. Flash memory refers to a special version of EEPROM in which the design allows for addressing complete blocks of data rather than individual cells, thereby significantly improving speed performance. EEPROM involves extra processing in FEOL; FRAM and MRAM are positioned high up in BEOL and involve foreign materials potentially harmful for proper functioning of the underlying CMOS.

There are large differences in performance between the various memories. At the risk of oversimplifying things, the below table can provide some guidance

• Speed: SRAM>MRAM>DRAM>FRAM>EEPROM

• Area efficiency: EEPROM>DRAM>MRAM>FRAM>SRAM

• Power efficiency: EEPROM>FRAM>MRAM>SRAM>DRAM

related to disk storage.

3.2 Analog/RF

Analog signal processing are found wherever the human interface is involved, which largely comes down to speech and vision, but also includes more general phenomena in the physical environment such as position, motion, temperature, and radiation. Signal accuracy and stability is crucial in this stage, and this is where bipolar transistors are fundamentally superior to MOSFETs, especially at frequencies over 100 MHz. The device architecture and operation of bipolar transistors is fundamentally different from that of MOSFETs, involving amongst others epitaxial growth in the switching area.

A description of bipolar technology can be found elsewhere [6]. Bipolar transistors can be integrated with CMOS leading to a process option known as BiCMOS. Limiting the MOSFET part to one flavor only results in a much-simplified group of technologies called BiMOS.

BiCMOS is significantly more complex than baseline CMOS, but the eventual circuit can be relatively simple. Gate length has limited the maximum transmission frequency in older generations of CMOS, making BiCMOS a necessity for all RF applications above ~1 GHz. In more advanced CMOS generations it is intrinsic RF noise, not gate delay that spoils the MOSFET circuit performance. The transmission frequency and computing power of technology generations beyond 0.18 µm allows optimized CMOS-only circuits (RFCMOS) to compete with BiCMOS.

Nevertheless, RFCMOS solutions come at a price, as a very large amount of circuit overhead is needed to compensate for the overall non-ideality of MOSFET, most notably the RF noise.

3.3 Passive Integration

Tuning and matching are invariably part of any RF circuit, implying the presence of relatively large inductors and capacitors on or in close proximity the active die. Placing these components nearby limits the negative effects of parasitics and cross talk that always complicates RF system design. Passive elements can be defined on many places in a regular baseline CMOS, but best performance requires extra process steps again. For example, tantalum oxide and tantalum oxynitride can be placed between BEOL interconnect layers to realize high-quality RF metal-insulator-metal (MIM) capacitors.

Memory options still under investigation include phase-change chal-cogenide and large-area MEMS, both involving technologies remotely

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Figure 9 shows is the mask layout drawing of a typical BiCMOS design clearly showing large embedded inductors that occupy almost entirely the right half of the die. An alternative to embedding passives as described above is to separate the more bulky components from the active circuit and integrate them on a dedicated silicon die with very limited semiconductor functionality. The flowchart of process options for passive integration can be very simple and will be able, therefore, to effectively compete with passives on the active die and solutions where the passives are mounted elsewhere on the system PCB. Depending on overall system architecture, passive silicon dies may even serve as an interconnect substrate in advanced SiP.

Obviously, RF is the dominant application, but passive integration can be used equally well in other environments where passives are important, such as in dc-dc voltage converters. Figure 10 shows an example of SiP passive integration; here, an active die is flip-chipped on a much larger but significantly less complicated passive die holding bulky high-quality inductors together with high-density trench capacitors.

Figure 9. BiCMOS mask drawing, actual size 8 mm²(Source: Philips)

actual size 27 mm²(Source: Philips)

3.4 High-Voltage/Power

For baseline CMOS, high voltage is a relative term. To be able to have a 1.2-V CMOS process interfacing with an external signal source of, e.g., 5 V, MOSFETs with a thicker gate oxide need to be embedded on the wafer to serve as input-output (I/O) devices, as the 1.2-V standard transistors will break down under this voltage stress. The conventional approach in all baseline CMOS is to ‘borrow’ the necessary transistors from an older CMOS generation. This allows reuse of existing and proven circuit designs. More is needed to reach the voltage levels typical for automotive (60 V) and mains (200-600 V). Of course, a large transistor with a double diffusion (DMOS) is needed to reduce the field in the source and drain areas, but also deep trench oxide isolation and buried implants to prevent lateral avalanche breakdown.

An elegant solution for high-voltage applications are to work from silicon-on-oxide wafers (SOI) having an oxide layer embedded very close to the top surface. Perfect lateral isolation can now be achieved by cutting trenches down to the buried oxide, allowing pockets of very different voltage ranges to be designed in very close proximity to each other. This approach

Figure 10. GSM transceiver with active die flip-chipped on passive die;

also greatly simplifies the FEOL processing. Another application of SOI wafer technology not related to the high-voltage/power domain is in boosting the performance of baseline CMOS in microprocessor applications through reduction of substrate leakage and parasitic capacitances. A disadvantage of SOI is the reduced thermal conductivity caused by the embedded oxide, which puts higher demands on the package.

3.5 Sensors and Actuators

Main fields of application for sensors are magnetic field, pressure, and acceleration; for actuators the fields are fluidics and optics. Virtually all devices listed here are MEMS-based, sensing magnetic field being the major exception. This device derives its signal from a special ferromagnetic layer of which the resistance depends on its orientation relative to an external field. The external field may be induced by a moving magnet in sensing position and speed, or it may be the earth magnetic field in which case the device is a solid-state compass.

One of the better-known MEMS sensors is the accelerometer used in many automotive airbag systems. Here, a freestanding comb-shaped strip is Micro-electromechanical switches (MEMS) is a term often used in relation to sensors and actuators. MEMS technology focuses on miniatu-rizing moving parts, usually involving Si wafers as substrate and CVD poly-Si as layered building blocks, with phosphorus-doped CVD silicon oxide as sacrificial layer to generate floating parts to allow horizontal and vertical displacement, and even rotation. Conventional chemicals such as buffered HF and KOH may be used to pattern the oxide and the silicon, respectively.

From the relatively large dimensions, which may involve etching straight through a wafer, this mode of patterning is usually referred to as micro-machining. More recently, high-rate dry etching with magnetic-field enhanced RF plasmas as well as direct processing of the Si wafer itself have found more application, thereby reducing the gap between the worlds of MEMS and baseline CMOS. MEMS have some specific issues when brought to practical use, most of them related with movement. This includes sticking by electrostatic charging or microadhesion (‘stiction’), corrosion, debris, and particles in general.

defined through a sacrificial layer technique. Forces generated in decele-ration make the strip bend, an effect that can be detected by checking the capacitance between the strip and a stationary part of the structure. Airbag sensors are used in the 10-g range. More sensitive accelerometers use the earth gravity; by integrating multiple comb structures allowing in-plane (XY) as well as out-of-plane (Z) movement, these devices can be used as absolute 3D position detectors. Such products need to be relatively large

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modified design the microphone may double as loudspeaker.

The dominant MEMS actuators are the dies that form the ejection part of an inkjet printer head, and the digital mirror device that is the imaging part in many video projectors. Applications related to actuators are solid-state resonators, which includes surface and bulk acoustic wave devices, and RFMEMS, high-quality-factor mechanical RF switches operated by applying a DC voltage across the tongues. The latter is depicted in Figure 11.

Solid-state biosensors are an emerging business. Most of the interest is going to the development of mechanisms to derive electrical signals from the biochemical interaction with the substrate in which the detection is done.

The silicon plays a much less important role here, serving mainly as a convenient mechanical carrier and multi-field electrode for the active bio-layers.

Technically, it is usually very well possible to combine MEMS technology with baseline CMOS. Since all sensors and actuators need drive circuitry to be operated, and the signal levels are typically quite low, this may be a convenient solution. Whether it is also the best solution depends on the eventual overall cost level. MEMS devices tend to relatively large, much larger at least than the amount of silicon typically needed to realize the necessary analog signal processing. To be able to draw conclusions, the overall system including the packaging has to be taken into account.

Figure 11. RFMEMS (Source: Philips)

(>1 mm ) to be able to have enough mass in the moving body. Pressure sensing involves a thin free-standing Si or piezoelectric material membrane.

A special version of a pressure sensor is the solid-state microphone; in a