Figure 7.6 (A) IV characteristics and (B) single pairing STDP diagrams for BFTO memristor with ca. 600 nm thick BFO thin film and a contact area size of 4.5E4 µm2. Initialization pulse amplitude Vw = |8 V|. Pulse amplitude of pre- and postspikes for both LTP and anti-LTD
curves Vp, a= Vp, aLTP= Vp, aLTD = 3 V. Pulse width tp= 10 ms, exponential decay τ = 25
ms and measurement waiting time tw= 10 s.
7.5
STDP emulation in BFTO/BFO memristors
STDP emulation has furthermore been tested in BFO memristors with two flexible barriers (BFTO/BFO memristor for short). The detailed signal schemes for the realization of STDP function in BFTO/BFO memristor are illustrated in Fig. 7.7. According to the IV characteris- tics of BFTO/BFO memristor recorded between the Au top electrode and Pt bottom electrode, the hysteretic loops are realized in both positive and negative bias ranges in the BFTO/BFO memristive cell (Fig. 7.8A). When a negative bias is applied to the bilayer structure, the reading currents IPHRSand INLRS can be recorded at a small reading bias Vr = 2 V and Vr
= -2 V, respectively, while the reading current IPLRS and INHRScan be read out if a positive
bias is applied. The inset of Fig. 7.8A depicts a schematic sketch of the BFTO/BFO bilayer structure. The BFTO and BFO thin films are deposited on a Pt/Sappire substrate by PLD. Both state currents and their corresponding reading pulses are depicted in the signal schemes Fig. 7.7. In the case spike timing ∆t > 0, i.e. prespike proceeds postspike, it has the Memory initialization of BFTO/BFO memristor in HRS, thus the state currents IPHRS/INLRS or the
STDP currents ILTP/IaLTDcan be read out at reading bias +2 V/-2 V after applying a negative
writing voltage or prepost spikes to the device, respectively. On the other hand, if spike timing ∆t < 0, i.e. post spike proceeds prespike, the device is initialized into LRS, both state
130 Spike-timing dependent plasticity (STDP) in BFO-based artificial synapses
Figure 7.7 Signal scheme of single pairing spike sequence for Memristor initialization, Single spike pairing STDP, and Memory consolidation. (a) A pre-post spike order is used for long term potentiation (LTP) when Vr= 2 V and anti-long term depression (aLTD) when Vr
= -2 V. (b) A post-pre spike order is used for long term depression (LTD) when Vr = 2 V
and anti-long term potentiation (aLTP) when Vr = -2 V. ∆t is the spike timing between pre-
and postspikes. tpis the pulse width. twis the measurement waiting time before applying
the reading pulse (Reading pulse amplitude +2 V is arranged for BFO memristor, -2 V for BFTO memristor, and +2 V or -2 V for BFTO/BFO memristor).
currents IPLRS/INHRSor STDP currents ILTD/IaLTPare recordable. Therefore, with the help
7.5 STDP emulation in BFTO/BFO memristors 131 as shown in Fig. 7.8B. To the best of our knowledge, the STDP implementation in all four quadrants with one single cell has not been demonstrated so far with artificial synapses.
Figure 7.8 (A) IV characteristics and (B) single pairing STDP diagrams for BFTO/BFO memristor with ca. 600 nm thick BFO thin film and a contact area size of 4.5E4 µm2. The device can be initialized into state PLRS, NHRS (hollow symbols) by applying positive writing bias Vw= 6 V, whereas into state PHRS, NLRS (solid symbols) by negative writing
bias Vw= -6 V. Pulse amplitude of pre- and postspikes for both STDP and anti-STDP curves
Vp= Vp, LTP= Vp, LTD = 3 V and Vp, a = Vp, aLTP = Vp, aLTD = 2.7 V. Pulse width tp= 10 ms,
exponential decay τ = 10 ms and measurement waiting time tw= 2 s.
During the single pairing STDP measurement the pulse width tp = 10 ms is kept constant.
The LTP and LTD curves are recorded by using the pulse amplitude Vp= Vp, LTP= Vp, LTD=
3.0 V and reading bias Vr = +2.0 V. In order to derive the anti-LTP and anti-LTD curves, the
pulse amplitude Vp, a= Vp, aLTP= Vp, aLTD= 2.7 V and reading bias Vr = -2.0 V are chosen.
In the single pairing STDP measurement, the potentiating spike sequence is determined when the BFTO/BFO memristor is initialized into HRS and followed by the prepost spikes, and it results in potentiation current (LTP or anti-LTP curves). The depressing spike sequence is when the BFTO/BFO memristor is initialized in LRS and followed by the postpre spike, which leads to depression current (LTD or anti-LTD curves). The synaptic weight scales with the normalized potentiation current after the potentiating spike. For both LTP and anti-LTP curves, by using the HRS current both in positive and negative bias ranges the normalized potentiation currents ∆ILTPand ∆IaLTPare defined as
132 Spike-timing dependent plasticity (STDP) in BFO-based artificial synapses ∆ILT P(%) = ILT P− IPHRS ILT P · 100%, (7.9) ∆IaLT P(%) = IaLT P− INHRS IaLT P · 100%. (7.10) After a depressing spike sequence the synaptic weight scales with the normalized depression current. The normalized depressing current for both LTD and anti-LTD curves by using the LRS current both in positive and negative bias ranges are defined as follows
∆ILT D(%) = ILT D− IPLRS IPLRS · 100%, (7.11) ∆IaLT D(%) = IaLT D− INLRS INLRS · 100%. (7.12) Note that the synaptic weight changes in both LTD and anti-LTD curves are smaller than the case in the LTP and anti-LTP curves. This is because the BFO memristor with two flexible barriers is initialized in LRS for both LTD and anti-LTD curves with a writing bias of +7 V and -7 V, respectively. Considering the switching dynamics where the switching velocity from LRS to HRS is slower than that from HRS to LRS, thus, during the STDP measurement with the same bias amplitude and pulse width, the conductance change from LRS to HRS (synaptic weight) is smaller than that from HRS to LRS. It is also important to mention that the synaptic weight range in STDP or anti-STDP branches depends on its own On/Off ratio range of memristive device in positive or negative bias ranges, respectively. Given a larger On/Off ratio, the larger normalization current in both STDP or anti-STDP branches is feasible.