CAPITULO 3.EVALUACIÓN DE LA SOLUCIÓN
3.4 Conclusiones
4.8.1 Single-Ended Transmission Lines
Engineers and designers sometimes daisy-chain traces for ease of routing.
Unless the distance is small between loads, with respect to propagation length and signal edge transitions, signal integrity concerns may develop.
These concerns include ringing and reflection. Daisy-chaining may also impact signal quality and EMI spectral energy distribution to the point of nonfunctionality or noncompliance. Therefore, radial connections for fast edge transition signals are preferred over daisy-chaining for nets with a single, common drive source. Radial connection refers to a single point-to-point connection from a driver capable of sourcing multiple loads
simultaneously. Each component must have its respective trace terminated in its characteristic impedance as shown in Fig. 4.10, using a termination method appropriate for circuit operation.
Figure 4.10: Termination of clock traces.
If an electrically long signal trace route must be implemented, this trace must be properly terminated. Long transmission lines generally require use of high-current driving components. One should calculate the terminating resistor value at the Thevenin equivalent or characteristic impedance of the trace. Use of "T-stubs" or bifurcated lines is generally not allowed. A
bifurcated trace is a single trace that is broken up into two traces routed to different locations. Each T-stub trace will have a characteristic impedance of 2Z
o. This impedance discontinuity may cause signal integrity concerns, especially if the length of the stubs differs.
If a T-stub must be used, the maximum permissible stub length cannot
exceed , where L
d is the routed length of the trace and t
r is the signal transition time or edge rate. The length of each "T" from the center leg must be identical. With T-stubs, both capacitance and load
characteristics of components at the end of each stub must be exactly equal.
If a T-stub is required because of problems with layout or routing, stub lengths must be as short as possible. Components must be relocated to remove stubs created by an auto-placer. For applications where only a T-stub is possible, it becomes mandatory that both legs of the "T" be exactly identical in length! Note: This is rarely a satisfactory approach. Use the measurement feature of the CAD system to measure actual routed length.
If necessary, serpentine route the shorter trace of the two stubs until this trace equals its counter trace length exactly. This is owing to the fact that a reflected wave always occurs on a signal trace. Two traces mean there will be two reflected waves. Both waves will meet at the "T" connection on their return, usually with an amplitude or phase difference that will cause serious problems to develop at the junction, all the way back to the source.
A potential or fatal drawback of using T-stubs lies in future changes to the artwork. If a different PCB designer makes a change to the layout or
routing to implement rework or a redesign, knowledge of this T-stub
implementation may not be known. Accidental changes to the layout may occur, posing potential EMI or signal integrity problems.
4.8.2 Differential Pair Signaling
Differential pair signaling is designed to transmit logic signals between two systems (box-to-box, box-to-peripheral) that are referenced to different ground offsets by an amount too large for single-ended signals to function correctly. Consequently, the driver and receiver are designed to float with respect to ground. The receiver will always have a very large input signal gain. Thus, low-voltage-level transmissions are possible, even when severe attenuation is present in the transmission line.
An advantage of differential signaling is reduced EMI. This reduction exists because the magnetic field produced by one signal trace is canceled out by its corresponding trace. This occurs because the differential signals are equal and opposite (definition of differential mode). Differential-mode
transmission first became popular with use of ECL devices. Another benefit of differential signaling is immunity from common-mode energy coupling into the wire pair by external sources. This is owing to both signal traces being exposed to the same energy source, resulting in removal of the unwanted energy from the trace pair.
The objective of differential signaling is to deliver two clean signals from the driver to the receiver, regardless of how they travel, theoretically. This means that the trace pair can be side-by-side, spread apart, or routed on different layers. As long as the two signals arrive in good condition within the timing tolerance of the circuit, operation is assured. Notice that
maintaining the traces to a certain impedance value is not mandatory, as long as the signal amplitude and phasing are proper for system operation at the receiver. This is shown in Fig. 4.11.
Figure 4.11: Routing differential signal traces.
Certain logic families place a requirement on maintaining specific differential impedance between signal pairs. The ground and signal reference levels of the two devices in the figure are different, illustrating why differential signal transmission is required for certain applications.
Routing requirements for differential signaling need not be tightly controlled for most applications. Many design rules mandate that the routed trace be
within 0.100 in. (2.5 mm) of each other. This requirement makes it very difficult to route when changing layers or traveling around vias and other discontinuities. Length matching needs to be accurate enough only to prevent timing problems. A signal routed microstrip travels at a velocity of 1.68 ns/ft (0.140 ns/in. (0.36 ns/cm). For stripline, velocity of propagation is 2.11 ns/ft (0.176 ns/in. or 0.45 ns/cm). With knowledge of the velocity of propagation within the PCB for all but the fastest differential signaling protocols, length matching need not be more precise than 0.500 in. (1.27 cm). This relaxation in maintaining exact trace length for differential pair transmission lines allows for ease of autorouting and placement of vias.
With use of LVDS logic, operating at 250 ps, length matching would need to be within an accuracy of 1.5 in. (3.8 cm) or less [3].
Successful routing of differential signaling requires that the differential impedance between the two traces be properly terminated. These two transmission lines must also be equal in length, to within the timing
tolerances of the logic family being used. No appreciable electrical benefit to routing two traces side by side exists, except for certain applications related to signal integrity. However, if traces are not routed parallel to each other, serious EMI concerns develop.
Four concerns are present when routing differential signals between different layers:
1. Impedance control. When jumping layers, an impedance discontinuity is injected into the transmission line. This impedance discontinuity may cause reflections to be developed if the termination is not properly chosen. A different number of vias may exist between the two signal pairs, thus skewing signal integrity.
2. Return currents and layer jumping. Flux cancellation for the return current may not be optimal, especially for certain configurations.
Assume a double-sided PCB with no power and ground plane.
Separating the differential pair will result in significant development and propagation of RF energy. For multilayer assemblies, the return current may not have an optimal, low-impedance return path, thus allowing a RF loop to exist. For long routed traces, this loop could be significant. Common-mode RF energy is now developed.
3. Velocity of propagation. Traces routed microstrip will propagate
between source and load faster than stripline. With faster propagation of the electromagnetic wave, the microstrip signal may appear at the receiver long before the stripline signal, outside the timing margin of the circuitry, even when using matched trace lengths.
4. Development of common-mode energy. If a receiver is not the immediate load, but through interconnects to a cable or connector assembly (e.g., backplane configuration), a capacitive load will be presented to the trace. This capacitive load can cause the differential-mode signal to be converted to common differential-mode at the boundary
location, exacerbating EMI.
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Table of Contents 4.4: CAPACITIVE LOADING OF SIGNAL TRACES
4.9.1: Which Layers to Route Traces On
Chapter 4 - Clock Circuits, Trace Routing, and Terminations
Printed Circuit Board Design Techniques for EMC Compliance: A Handbook for Designers, Second Edition by Mark I. Montrose
IEEE Press © 2000 Recommend this title?