Detector concept studies for future linear colliders have established a number of chal- lenging performance goals based on the analysis of benchmark channels and an eval- uation of the future e+e− colliders environment. The first layer of the ILC and CLIC 1The thermo-mechanical tests presented in this chapter have been performed by the author in
three institutes, IFIC, DESY and CERN. The power pulsing system, presented in Section3.2, was developed by José Manuel Deltoro as part of his final degree work in Electronic Engineering. The shown results on integrated cooling in silicon detectors are based on Reference [56].
3.1. Ultra-light Silicon Detectors 46 vertex detectors must cope with large backgrounds due to incoherent pair production.
The required impact parameter resolution (Equation 2.2) goal represents a consid-
erable improvement over vertex detectors built at collider experiments to date; the constant term is better by a factor of two to four than what was achieved at previous colliders and at the LHC. Achieving the requirement for the second (material) term is even more challenging; it has to decrease by a factor of six to ten with respect to most previous experiments.
Intense detector R&D has yielded several candidate technologies that can meet these requirements. A good example is the DEPleted Field Effect Transistor (DEPFET) [57,58] technology, a highly granular, ultra-transparent active pixel detector for high- performance vertex reconstruction at future collider experiments. It reduces the ma- terial in the sensitive area to approximately 0.15 X0of radiation length. A DEPFET vertex detector for a future linear collider was proposed for the first time in 2002
[59, 60]. The DEPFET collaboration has since shown that finely segmented devices
with large in-pixel gain can indeed be constructed and operated. Read-out and con- trol ASIC have been designed and produced, and a novel ladder design with excellent thermo-mechanical properties has been developed.
3.1.1
Cooling strategies
To achieve an ultra low-mass detector configuration, cooling systems for future de- tectors must have the minimum impact on the material budget. Detector concepts for future electron-positron colliders [54,48] aim for a total material budget of 0.12 - 0.2% X0/layer. This would be equivalent to only 100-200 µm of silicon. Below, three cooling strategies compatible with this material budget are described:
• Power-pulsing
The power-pulsing scheme is actively pursued by the R&D effort for a future linear collider at the energy frontier (ILC, CLIC). The detectors follow the duty cycle of the machine (approximately 1 ms of collisions every 200 ms for the ILC, 150 ns of collisions every 20 ms for CLIC), going to a “stand-by” state during the long intervals between bunch trains, thus reducing the average power consumption by a large factor. One of the most significant benefits of power- pulsing is that the vertex and tracking detector may not need active cooling. This significantly lowers the overall mass budget for these detectors, which is crucial for obtaining the required resolution.
• Air flow cooling
The use of conventional liquid/two-phase cooling solutions would result in a significant increase in material budget from both the cooling medium and its tubing. Therefore, the use of a dry gas (air or N2) as a coolant for the inner region detectors would be a suitable option to achieve the specified material budget. The flow for barrel cooling is assumed to be from one barrel end to the other. This cooling method has been tested recently with a mock-up of the vertex detector for CLIC [61].
3.1. Ultra-light Silicon Detectors 47 • Micro-Channel Cooling (MCC)
Micro-cooling channels integrated in the detector itself provide a very effective means of removing heat. Bringing the cooling circuit to within hundreds of microns of the heat source and removing thermal barriers (material interfaces, glue layers) reduces the temperature gradient between the heat source and the cooling liquid. The minimal extra material in cooling fluid and circuits helps to reduce the material involved in removing the heat from the detector.
3.1.2
Mechanical samples
To evaluate the performance of the cooling strategies presented before, a number of mechanical samples, based on the silicon-on-insulator thinning concept [62] developed for DEPFET active pixel detectors, were produced. These thermo-mechanical samples are equipped with resistive circuits implemented in an Aluminium layer deposited on the surface, that simulate the heat-load from the read-out and steering electronics. Narrow traces are laid out in a serpentine geometry to maximize the length of the trace and thus achieve a resistance of 10-100 Ω.
(a) (b)
Figure 3.1: (a) Silicon mechanical sample based on the DEPFET ladder for the PXD of
Belle II experiment. (b)Petal-shaped sample for the FTD of the ILD detector concept. The frame has a thickness of 500 µm, whereas the sensor (central) region is thinned to 75 µm.
Pictures of two types of mechanical samples are shown in Figures3.1(a)and3.1(b). Three independent circuits roughly correspond to the end-of-ladder electronics of the DEPFET ladder design for Belle II (this is where the read-out chips are located), the balcony with steering chips (running along the lower edge of the images) and the sensor itself (the grey areas that cover the full width of the sensor). The instantaneous power dissipation is up to 6 W on less than 1 cm2 of the end-of-ladder area. On the sensor area and balcony, 1 W and 0.5 W are dissipated respectively.
Apart from the mechanical silicon ladders for the barrel region, several petal-shaped mechanical samples were also produced to characterise thermally the forward region of the vertex detector, as shown in Figure3.1(b). Petals were designed with the required