El contexto económico.

It was determined in chapter 3 that both positive and negative peak voltage readings are necessary due to variations in the way that farmers connect energisers to the fence. The operating range of the detector must start from 100V and continue until at least 12kV, while maintaining a reasonable degree of accuracy.

To save power, the peak detect circuit will be powered down while the device is idle. Therefore, the peak detector must be able to turn on fast enough to measure the first detected pulse. If achieved, this will allow the peak detector to be turned off between pulses to save even more power.

A number of circuit options were trialled, each of which are detailed below. J1 Fence R1 10M 1W R2 10M 1W R3 10M R7 1M R4 10M C2 0.1uF C1 0.1uF Vreg +ve trigger -ve trigger R6 10M R5 10M Peak Detect

Chapter 4 Hardware Design

4.3.1 Direct Sampling by High-Speed ADC

A sufficiently fast ADC is capable of taking multiple readings during a fence pulse. If each reading were stored successively, once the pulse is complete, the peak voltage can be determined in software. This allows the sampling network to be constructed from all passive components (except the ADC, which is available as a microcontroller peripheral – see Figure 4-8).

The advantages of direct sampling include low component count, able to use cheap passive components, very fast start up time, and readings are supplied with a known accuracy.

Figure 4-8: Sampling circuit for direct pulse measurement by high-speed ADC

To capture the peak value of a fence pulse, the ADC must take samples approximately every microsecond, requiring an ADC capable of at least one million samples per second. At the time this research was carried out, microcontrollers and external ADCs capable of this sampling rate were prohibitively expensive for this product.

4.3.2 Peak Detect Using Comparator

Comparators are commonly available as internal microcontroller peripherals, allowing the creation of very cheap and flexible peak detector circuits. When used as a unity gain buffer to charge a storage capacitor, the comparator output will go high while the input voltage is

J1 Fence 10M 1W R1 10M 1W R2 4k7 R3 0.1uF C5 voltage

Chapter 4 Hardware Design

higher than the voltage stored in the capacitor. A diode ensures that when the comparator output is low the capacitor is not discharged. The peak detector circuit shown in Figure 4-9 has been introduced in section 4.2.1 as an integrated pulse detector and peak detector circuit. As stated earlier, experimental results showed that this circuit did not provide accurate results due to overshoot issues.

Figure 4-9: Comparator based peak detect circuit

4.3.3 Peak Detect Using Two Single Rail Op-Amps

Op-amps are commonly used in peak detect circuits because of their fast operation (when the appropriate model is selected) and linear output. A simple non-inverting unity gain amplifier is used as a positive peak detector, and an inverting unity gain amplifier creates a negative peak detector. An ultra-fast diode is placed between each amplifier output and storage capacitor to convert the amplifiers into peak detector circuits. Both peak detect circuits work in parallel for each pulse, allowing the software to determine which value to use.

The use of an op-amp instead of a comparator greatly reduces overshoot in the storage capacitor because the op-amp has an analogue output proportional to the input, instead of a logic output.

Figure 4-10 provides the schematic of the positive and negative peak detector circuits. R1, R2, R7 and R8 lower the fence voltage to a level

J1 Fence R1 22M 1W _R2 5k6 C1+ C1- C1out C1 10nF D1 BAV70LT R3 150R

Chapter 4 Hardware Design

suitable for electronics. The maximum peak detect value of either circuit is the supply voltage minus one diode drop. With a 3.3V supply, the maximum input voltage is 2.6V. To measure at least 12kV, the resistance of R8 must be less than 4,550Ω (a standard value of 3k9Ω was used).

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Ω

R10 and R20 isolate the op-amp inputs from each other, and form part of the unity gain selection. R13 and R23 are bleed resistors, designed to allow the stored voltage in C10 and C20 to dissipate before the arrival of the next fence pulse. A time constant of 100ms was chosen to allow enough time to set and read the stored voltage (energiser pulses are required to be shorter than 10ms), but short enough to have fully dissipated before the next pulse (at least one second apart).[13, 19]

Figure 4-10: Positive and negative pulse peak detect circuit

Selection of an appropriate op-amp is critical to the operation of this circuit. To accurately capture the peak value of a fast-changing fence

J1 Fence R1 10M 1W R2 10M 1W R7 1M R8 3k9 R10 100k C1+ C1- C1out R12 100k D10 BAV70LT C10 0.1uF R20 100k C2- C2+ C2out R21 100k R22 100k D20 BAV70LT C20 0.1uF Vneg Vpos R13 1M R23 1M

Chapter 4 Hardware Design

pulse, the op-amp must have a high bandwidth and fast slew-rate. A high slew-rate is also important for fast turn-on because the peak detector can quickly react to full-scale inputs.[19]

For the inverting amplifier to work, the op-amp must be capable of operating with inputs below ground (otherwise to capture a negative going pulse the amplifier input would have to be pulled up to its power supply.[19]

Many op-amps were evaluated, and eventually the OPA2374 single rail dual op-amp was selected. Its 6.5MHz bandwidth and 5V/µs slew-rate allow zero to full-scale readings in less than 1µs. The device also has rail-to-rail input and output, allowing inputs of up to 200mV below ground.[20]