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Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dur-ing each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

25 INTERRUPTS:

Interrupts are hardware signals that are used to determine conditions that exist in external and internal circuits. Any interrupt can cause the 8052 to perform a hardware call to an interrupt –handling subroutine that is located at a predetermined absolute address in the program memory.

Five interrupts are provided in the 8052. Three of these are generated automatically by the internal operations: Timer flag 0, Timer Flag 1, and the serial port interrupt (RI or TI) Two interrupts are triggered by external signals provided by the circuitry that is connected to the pins INTO 0 and INTO1. The interrupts maybe enable or disabled, given priority or otherwise controlled by altering the bits in the Interrupt Enabled (IE) register, Interrupt Priority (IP) register, and the Timer Control (TCON) register. . These interrupts are mask able i.e. they can be disabled. Reset is a non maskable interrupt which has the highest priority. It is generated when a high is applied to the reset pin. Upon reset, the registers are loaded with the default values.

Each interrupt source causes the program to do store the address in PC onto the stack and causes a hardware call to one of the dedicated addresses in the program memory. The appropriate memory locations for each for each interrupt are as follows:

In interrupt A Address

The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel‘s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer.

By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a

26 powerful microcomputer, which provides a highly flexible and cost-effective solution to many embedded control applications.

Hardware details:

The on chip oscillator of 89C52 can be used to generate system clock. Depending upon version of the device, crystals from 3.5 to 12 MHz may be used for this purpose. The system clock is internally divided by 6 and the resultant time period becomes one processor cycle. The instructions take mostly one or two processor cycles to execute, and very occasionally three processor cycles. The ALE (address latch enable) pulse rate is 16th of the system clock, except during access of internal program memory, and thus can be used for timing purposes.

AT89C52 Serial port pins

PIN ALTERNATE USE SFR

P3.O RXD Seria data input SBUF

P3.I TXD Serial data output SBUF

P3.2 INTO External interrupt 0 TCON-1

P3.3 INT1 External interrupt 1 TCON- 2

The two internal timers are wired to the system clock and prescaling factor is decided by the software, apart from the count stored in the two bytes of the timer control registers. One of the counters, as mentioned earlier, is used for generation of baud rate clock for the UART. It would be of interest to know that the 8052 have a third timer, which is usually used for generation of baud rate. The reset input is normally low and taking it high resets the micro controller,

27 In the present hardware, a separate CMOS circuit has been used for generation of reset signal so that it could be used to drive external devices as well.

Writing the software:

The 89C52 has been specifically developed for control applications. As mentioned earlier, out of the 128 bytes of internal RAM, 16 bytes have been organized in such a way that all the 128 bits associated.

With this group may be accessed bit wise to facilitate their use for bit set/reset/test applications. These are therefore extremely useful for programs involving individual logical operations. One can easily give example of lift for one such application where each one of the floors, door condition, etc may be depicted by a single hit. The 89C52 has instructions for bit manipulation and testing. Apart from these, it has 8-bit multiply and divide instructions, which may be used with advantage. The 89C52 has short branch instructions for 'within page' and conditional jumps, short jumps and calls within 2k memory space which are very convenient, and as such the controller seems to favor programs which are less than 2k byte long. Some versions of 8751 EPROM devices have a security bit which can be programmed to lock the device and then the contents of internal program EPROM cannot be read. The device has to be erased in full for further alteration, and thus it can only be reused but not copied. EEPROM and FLASH memory versions of the device are also available now.

Memory unit:

Memory is part of the micro controller whose function is to store data. The easiest way to explain it is to describe it as one big closet with lots of drawers. If we suppose that we marked the drawers in such a way that they cannot be confused, any of their contents will then be easily accessible. It is enough to know the designation of the drawer and so its contents will be known to us for sure.

Memory components are exactly like that. For a certain input we get the contents of a certain addressed memory location and that‘s all. Two new concepts are brought to us:

addressing and memory location. Memory consists of all memory locations, and addressing is nothing but selecting one of them. This means that we need to select the desired memory

28 location on one hand, and on the other hand we need to wait for the contents of that location.

Besides reading from a memory location, memory must also provide for writing onto it. This is done by supplying an additional line, called control line. We will designate this line as R/W (read/write). Control line is used in the following way: if r/w=1, reading is done, and if opposite is true then writing is done on the memory location. Memory is the first element, and we need a few operation of our micro controller.

Central Processing Unit: various mathematical operations or any other operations with data wherever data can be found.

Look at the current situation. We have two independent entities (memory and CPU), which are interconnected, and thus any exchange of data is hindered, as well as its functionality. If, for example, we wish to add the contents of two memory locations and return the result again back to memory, we would need a connection between memory and CPU. Simply stated, we must have some ―way‖ through data goes from one block to another.

Bus:

That ―way‖ is called ―bus‖. Physically, it represents a group of 8, 16, or more wires.

There are two types of buses: address and data bus. The first one consists of as many lines as the amount of memory we wish to address, and the other one is as wide as data, in our case 8 bits or the connection line. First one serves to transmit address from CPU memory, and the second to connect all blocks inside the micro controller.

Input-output unit:

Those locations we‘ve just added are called ―ports‖. There are several types of ports:

input, output or bi-directional ports. When working with ports, first of all it is necessary to choose which port we need to work with, and then to send data to, or take it from the port.

29 When working with it the port acts like a memory location. Something is simply being written into or read from it, and it could be noticed on the pins of the micro-controller.

3.2 555 TIMER IC

The 555 Timer IC is an integrated circuit (chip) implementing a variety of timer and multi vibrator applications. The IC was designed by Hans R. Camenzind in 1970 and brought to market in 1971 by Signetics (later acquired by Philips). The original name was the SE555 (metal can)/NE555 (plastic DIP) and the part was described as "The IC Time Machine". It has been claimed that the 555 gets its name from the three 5 kΩ resistors used in typical early implementations, but Hans Camenzind has stated that the number was arbitrary. The part is still in wide use, thanks to its ease of use, low price and good stability. As of 2003, it is estimated that 1 billion units are manufactured every year.

Depending on the manufacturer, the standard 555 package includes over 20 transistors, 2 diodes and 15 resistors on a silicon chip installed in an 8-pin mini dual-in-line package (DIP-8). Variants available include the 556 (a 14-pin DIP combining two 555s on one chip), and the 558 (a 16-pin DIP combining four slightly modified 555s with DIS & THR connected internally, and TR falling edge sensitive instead of level sensitive).

Ultra-low power versions of the 555 are also available, such as the 7555 and TLC555. The 7555 requires slightly different wiring using fewer external components and less power.

30 The 555 has three operating modes:

Monostable mode:

In this mode, the 555 functions as a "one-shot". Applications include timers, missing pulse detection, bounce free switches, touch switches, frequency divider, capacitance measurement, pulse-width modulation (PWM) etc

A stable - free running mode:

The 555 can operate as an oscillator. Uses include LED and lamp flashers, pulse generation, logic clocks, tone generation, security alarms, pulse position modulation, etc.

Bi stable mode or Schmitt trigger:

The 555 can operate as a flip-flop, if the DIS pin is not connected and no capacitor is used. Uses include bounce free latched switches, etc. The 555 Timer IC is available as an 8-pin metal can, an 8-pin mini DIP (dual-in-package) or a 14-pin DIP.

 This IC consists of 23 transistors, 2 diodes and 16 resistors. The explanation of terminals coming out of the 555 timer IC is as follows. The pin number used in the following discussion refers to the 8-pin DIP and 8-pin metal can packages.

3.2.1 555 timer ic pin diagram

31 555 timer IC 8 pin configuration

 Pin 1: Grounded Terminal. All the voltages are measured with respect to this terminal.

 Pin 2: Trigger Terminal. This pin is an inverting input to a comparator that is responsible for transition of flip-flop from set to reset. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin.

 Pin 3: Output Terminal. Output of the timer is available at this pin. There are two ways in which a load can be connected to the output terminal either between pin 3 and ground pin (pin 1) or between pin 3 and supply pin (pin 8). The load connected between pin 3 and ground supply pin is called the normally on load and that connected between pin 3 and ground pin is called the normally off load.

 Pin 4: Reset Terminal. To disable or reset the timer a negative pulse is applied to this pin due to which it is referred to as reset terminal. When this pin is not to be used for reset purpose, it should be connected to + VCC to avoid any possibility of false triggering.

 Pin 5: Control Voltage Terminal. The function of this terminal is to control the threshold and trigger levels. Thus either the external voltage or a pot connected to this pin determines the pulse width of the output waveform. The external voltage applied to this pin can also be used to modulate the output waveform. When this pin is not used, it should be connected to ground through a 0.01 micro Farad to avoid any noise problem.

 Pin 6: Threshold Terminal. This is the non-inverting input terminal of comparator 1, which compares the voltage applied to the terminal with a reference voltage of 2/3 VCC. The amplitude of voltage applied to this terminal is responsible for the set state of flip-flop.

 Pin 7: Discharge Terminal. This pin is connected internally to the collector of transistor and mostly a capacitor is connected between this terminal and ground. It is called discharge terminal because when transistor saturates, capacitor discharges through the transistor. When the transistor is cut-off, the capacitor charges at a rate determined by the external resistor and capacitor.

 Pin 8: Supply Terminal. A supply voltage of + 5 V to + 18 V is applied to this terminal with respect to ground (pin 1).

32 The 555 timer IC is an amazingly simple yet versatile device. It has been around now for many years and has been reworked into a number of different technologies. The two primary versions today are the original bipolar design and the more recent CMOS equivalent. These differences primarily affect the amount of power they require and their maximum frequency of operation; they are pin-compatible and functionally interchangeable.

This page contains only a description of the 555 timer IC itself. Functional circuits and a few of the very wide range of its possible applications will be covered in additional pages in this category.

The operation of the 555 timer revolves around the three resistors that form a voltage divider across the power supply, and the two comparators connected to this voltage divider. The IC is quiescent so long as the trigger input (pin 2) remains at +VCC and the threshold input (pin 6) is at ground. Assume the reset input (pin 4) is also at +VCC and therefore inactive, and that the control voltage input (pin 5) is unconnected. Under these conditions, the output (pin 3) is at ground and the discharge transistor (pin 7) is turned on, thus grounding whatever is connected to this pin.

The three resistors in the voltage divider all have the same value (5K in the bipolar version of this IC), so the comparator reference voltages are 1/3 and 2/3 of the supply voltage, whatever that may be. The control voltage input at pin 5 can directly affect this relationship, although most of the time this pin is unused.

The internal flip-flop changes state when the trigger input at pin 2 is pulled down below +V_CC/3. When this occurs, the output (pin 3) changes state to +V_CC and the discharge transistor (pin 7) is turned off. The trigger input can now return to +V_CC; it will not affect the state of the IC.

However, if the threshold input (pin 6) is now raised above (2/3)+VCC, the output will return to ground and the discharge transistor will be turned on again. When the threshold input returns to ground, the IC will remain in this state, which was the original state when we started this analysis.

33 The easiest way to allow the threshold voltage (pin 6) to gradually rise to (2/3)+V_CC is to connect it to a capacitor being allowed to charge through a resistor. In this way we can adjust the R and C values for almost any time interval we might want.

The 555 can operate in either monostable or astable mode, depending on the connections to and the arrangement of the external components. Thus, it can either produce a single pulse when triggered, or it can produce a continuous pulse train as long as it remains powered.

In monostable mode, the timing interval, t, is set by a single resistor and capacitor, as shown to the right. Both the threshold input and the discharge transistor (pins 6 & 7) are connected directly to the capacitor, while the trigger input is held at +V_CC through a resistor. In the absence of any input, the output at pin 3 remains low and the discharge transistor prevents capacitor C from charging.

When an input pulse arrives, it is capacitively coupled to pin 2, the trigger input. The pulse can be either polarity; its falling edge will trigger the 555. At this point, the output rises to +VCC and the discharge transistor turns off. Capacitor C charges through R towards +VCC. During this interval, additional pulses received at pin 2 will have no effect on circuit operation.

The standard equation for a charging capacitor applies here: e = E(1 - ^(-t/RC)). Here,

"e" is the capacitor voltage at some instant in time, "E" is the supply voltage, VCC, and " " is the

34 base for natural logarithms, approximately 2.718. The value "t" denotes the time that has passed, in seconds, since the capacitor started charging.

We already know that the capacitor will charge until its voltage reaches (2/3)+VCC, whatever that voltage may be. This doesn't give us absolute values for "e" or "E," but it does give us the ratio e/E = 2/3. We can use this to compute the time, t, required to charge capacitor C to the voltage that will activate the threshhold comparator:

2/3 = 1 - ^(-t/RC)

The value of 1.1RC isn't exactly precise, of course, but the round off error amounts to about 0.126%, which is much closer than component tolerances in practical circuits, and is very easy to use. The values of R and C must be given in Ohms and Farads, respectively, and the time will be in seconds. You can scale the values as needed and appropriate for your application, provided you keep proper track of your powers of 10. For example, if you specify R in megohms and C in microfarads, t will still be in seconds. But if you specify R in kilo ohms and C in microfarads, t will be in milliseconds. It's not difficult to keep track of this, but you must be sure to do it accurately in order to correctly calculate the component values you need for any given time interval. The timing interval is completed when the capacitor voltage reaches the (2/3)+VCC

upper threshold as monitored at pin 6. When this threshold voltage is reached, the output at pin 3 goes low again, the discharge transistor (pin 7) is turned on, and the capacitor rapidly discharges back to ground once more. The circuit is now ready to be triggered once again.

35

If we rearrange the circuit slightly so that both the trigger and threshold inputs are controlled by the capacitor voltage, we can cause the 555 to trigger itself repeatedly. In this case, we need two resistors in the capacitor charging path so that one of them can also be in the capacitor discharge path. This gives us the circuit shown to the left.

In this mode, the initial pulse when power is first applied is a bit longer than the others, having a duration of 1.1(Ra + Rb)C. However, from then on, the capacitor alternately charges and discharges between the two comparator threshold voltages. When charging, C starts at (1/3)Vcc and charges towards V_CC. However, it is interrupted exactly halfway there, at (2/3)V_CC.Therefore, the charging time, t1, is ln(1/2)(Ra + Rb)C = 0.693(Ra + Rb)C.

When the capacitor voltage reaches (2/3)VCC, the discharge transistor is enabled (pin 7), and this point in the circuit becomes grounded. Capacitor C now discharges through Rb alone. Starting at (2/3)V_CC, it discharges towards ground, but again is interrupted halfway there,

When the capacitor voltage reaches (2/3)VCC, the discharge transistor is enabled (pin 7), and this point in the circuit becomes grounded. Capacitor C now discharges through Rb alone. Starting at (2/3)V_CC, it discharges towards ground, but again is interrupted halfway there,