41damentales para la incorporación de los micronutrientes al suelo, los cuales

Nanowires were grown on the buffer layers, InP (111)A and B substrates, and Si (111) substrates in the same growth run, at the temperature of 420°C and V/III ratio of 350. According to previous studies, these growth conditions result in predominantly WZ phase nanowires [32]. Figure 5.7 shows SEM images of the nanowires grown on the bare Si substrate, InP (111)B substrate, InP (111)A substrate and the non-annealed buffer layer, respectively. As seen in Figure 5.7 (a), on bare Si substrate, whisker and island growth is prominent, giving very low overall nanowire yield. The nanowires are kinked and more importantly, the growth direction is random with extremely poor vertical yield. Vertical yield on the InP (111)B substrate is 100% and over 97% on the buffer layer. Figure 5.7 (e) shows a top view of Figure 5.7 (d), with vertical nanowires seen as bright white dots and non- vertical wires (marked by arrows) clearly visible against the buffer layer. The inset shows a X-SEM view of the nanowires with the Si substrate and buffer layer visible. The density of nanowires on the buffer layer is slightly higher than that on InP (111)B substrate. The average density of nanowires on the buffer layer is 0.67 m-2, whereas the density on the InP substrate is 0.54 m-2. This is due to the slightly higher adherence of Au particles to the rougher buffer layer surface (RMS roughness 3 nm) compared to the commercially polished InP substrate (RMS roughness < 0.5 nm).

The two sets of nanowires also show a difference in length. The length of the nanowires grown on the InP (111)B substrate is 6.4 ± 0.4 µm, whereas the length of those grown on the InP buffer layer is 7.6 ± 0.3 µm (for the same 30 nm Au particle diameter). Figure 5.6: (a) X-SEM image of an overcut etch pit formed in the buffer layer after dipping in Br2:methanol solution, (b) (111)B InP surface formation on Si (111).

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High Vertical Yield InP Nanowire Growth on Si (111) Using a Thin Buffer Layer for Integration with Si Technology

Both, the slightly higher nanowire density and the increased surface roughness should lead to shorter nanowires in the case of growth on the buffer layer, which is contrary to what is observed. The possible mechanisms that could play a role in this increased growth rate on the buffer layer include the synergetic effect, that has been previously observed for III-V nanowires [47], or differences in the oxide layer properties between the epi-ready InP substrate and the native-oxide covered buffer layer [48, 49]. In order to test the hypothesis of the surface oxide, nanowires were grown on InP (111)B substrates and the buffer layer after removing any surface oxides by etching in 10% H3PO4 acid for 2 min. The growth rate of

nanowires on both substrates increased compared to the reference samples from which the oxide was not removed. However, the increase in the growth rate on InP substrate indeed was higher than that on the buffer layer reducing the percentage difference from 19% (above) to 8%. The reduction in difference in length suggest that the differences in surface oxides could be playing a role in increased growth rate of nanowires on the buffer layer up to Figure 5.7: SEM images of nanowires grown at 420°C and V/III ratio of 350 on (a) bare Si substrate, (b) InP (111)B substrate, (c) InP (111)A substrate, (d) non-annealed buffer layer. (e)Top view image of (d) with arrows indicating non-vertical nanowires, inset shows a X-SEM view of nanowires with the buffer layer. (f) PL spectra from ensembles of nanowires grown on InP (111)B substrate and buffer layer.

93 some extent. On the other hand, the remaining 8% difference suggests that oxide cannot be the only cause. It is most probably a combinational effect of few different factors that leads to this observation, although not completely clear at this stage.

The variation of nanowire length across the buffer layer sample is negligible and is more or less similar to the variation seen on the InP (111)B substrate. This shows that there is no significant impact on the nanowire morphology from the presence of step edges and height differences in the terrace structures of the buffer layer.

Nanowire growth on InP (111)B and A substrates are significantly different as seen in Figures 5.7 (b) and (c). As confirmed by top and side view images, the nanowires on InP (111)A are predominantly growing along the <111>B directions which are at an angle of 19.5° with respect to the substrate surface and exhibit a trigonal symmetry from the top view. In addition, there are nanowires growing in <110> and <112> directions as well as kinked wires growing in irregular directions. There is also a smooth 2D layer growth in between the nanowires on the substrate as can be clearly seen in the inset of Figure 5.7 (c). The nature of nanowire growth on the buffer layer compared with that on the InP (111)A and B substrates further confirms that the buffer layer is behaving entirely as an InP (111)B substrate and shows no presence of (111)A domains. As these buffer layers grown on Si(111) are entirely of B polarity, they are free of inversion domains.

The optical properties of InP nanowires grown on InP (111)B substrates have been extensively investigated [50, 51]. It is important that these properties are maintained when the nanowires are grown on the buffer layer in order to fabricate high quality optoelectronic devices on the Si. PL spectra were obtained from ensembles of nanowires grown on InP (111)B substrates and the buffer layer on Si at room temperature. As seen in Figure 5.7 (f), the spectra are similar and show emission at 1.46 eV. This energy corresponds exactly to the transition from the conduction band to the split-off valence band of WZ InP, which is  30 meV lower than the first valence band [51] as discussed in Chapter 2.7. Also note that the slight differences in the line widths of the two plots are due to differences in physical nanowire distribution, arising from the dry mechanical transfer process to bare Si substrates before measurement.

Apart from minor differences in density and length, the nanowires grown on the buffer layer are identical to the nanowires grown on InP substrate in terms of morphology and optical properties. TEM studies have also been performed on the two types of nanowires and they are both of WZ crystal phase with similar densities of stacking faults. Other growths (not shown here) have been carried out on the buffer layer at different growth conditions and it is found that the properties of the nanowires are same as of those grown homoepitaxially for the particular growth condition. Nanowires were also grown on the annealed buffer layer (not shown here), and they are similar to those grown on the non-annealed buffer layer in terms of percentage of vertical yield, morphology, crystal structure and optical properties.

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High Vertical Yield InP Nanowire Growth on Si (111) Using a Thin Buffer Layer for Integration with Si Technology

5.5

Summary

In summary, growth of InP nanowire on Si (111) substrates is demonstrated using a thin InP buffer layer. A two-step growth process is used for the growth of the buffer layer. A low temperature and a very high V/III ratio are needed for the nucleation of the initial layer on Si. The choice of temperature and V/III ratio is again important during the second layer growth in order to achieve smooth morphology with minimal layer thickness. It is found that the additional post growth annealing step does not improve the crystal quality of the layer noticeably, as most of the relaxation had already taken place during the second layer growth. The buffer layer is (111)B oriented and shows stacking faults both parallel and inclined to the substrate. The vertical yield of nanowires on the buffer layer is over 97%. The morphology and optical properties of the nanowires grown on this buffer layer on Si substrates are very similar to those grown on InP (111)B substrates. It is also seen that the crystal defects of the buffer layer do not have a significant effect on vertical yield or the properties of the nanowires. This means that the intermediate buffer layer approach provides an option to grow InP nanowires on Si, with the possibility of directly adopting growth parameters from the homoepitaxial growth system for the desired result. Additionally, in the current case of Au seeded nanowires, the buffer layer prevents the contact of Au with the Si substrate. Hence, this opens up the opportunity to replicate phase perfected InP nanowires [50] and their applications [3, 4, 6] on Si, for future microelectronic compatible devices, in a much easier and better way than by direct growth on bare Si substrate.

5.6

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