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Dar de alta acreedor en el proceso

6. Proceso de Audiencia de Cuentas

6.1. Dar de alta acreedor en el proceso

Having briefly introduced the advances in semiconductor technology over the past fifty years, the subsequent issues resulting from the reduction in the physical dimensions of devices and interconnects and the contributions of this research towards low swing signalling application; the subsequent chapters will described the work carried out in this research programme to address the power and performance issues related to scaling effects on interconnects. Chapter 2 reviews low voltage swing techniques for line driver implementation as these methods are considered to be the most efficient regarding power dissipation and have less impact on performance. Chapter 3 introduces advancement to the state of the art in low voltage swing driver design. Building on the work outlined in Chapter

19 3 a complete on-chip signalling system comprises, driver, interconnect and receiver, represented by a level converter is also presented. As device geometries shrink circuit packaging densities increase and circuit application become more susceptible to temporary faults such as crosstalk and SEUs, thus it is important to consider the effect of these faults on the low-swing signalling schemes, as discusses in Chapter 4. Subsequently, as technology nodes become smaller the effects of process variations on circuit performance become more evident; consequently Chapter 5 outlines the analyses of the effect of process variation on the performance of the proposed signalling system. The final chapter comprises the discussion of the performance and variability analyses carried out in previous chapter and followed by the overall conclusions resulting from the investigation, and suggestions for future works, respectfully.

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Chapter 2

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