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DESARROLLO DEL CAPITAL HUMANO Desarrollo Estudiantil

In order to simplify the operation of IBDGs during normal and faulty conditions, it is assumed that a constant dc voltage is provided on dc side of the inverter irrespective of the type of connected distributed energy system [67]. Hence, only grid side of DG power electronic interface is considered for the study. The inverter interface is modeled as a typical CC-VSI [83] with an L-filter connected on its ac side. The filter is used to attenuate high order current harmonics caused by high switching frequency of inverters while low frequency current harmonics are eliminated through a sinusoidal PWM scheme. Since the IBDG PE interfaces are modeled as CC-VSIs in both normal and fault conditions, the modulation parameters of the PWM modulator are set using a current control loop based on the inverter current references. During normal operation of the system, current references are updated continuously in order to control output power of the inverter. When a fault happens in the system, the control system is triggered with a signal from the fault detection unit. In this situation, the IBDGs change their operation to FCM units and manage the fault current based on the new references calculated for the fault condition.

Moreover, choice of controller plays an important role in regulating the output current of VSIs. In this work synchronous PI regulators are chosen for normal operation to regulate the PWM-VSI output current with a zero steady state error. Same type of controller can be used for balanced fault situations. However, it is suggested to use a P+Resonance controller [80] for unbalance fault situations if the control operation is intended to perform for each phase in abc frame. This controller makes it possible to control three phases of output current independently while zero steady state error is achieved in each phase. In case of poor transient response of P+Resonance regulator, next controller choice will be a PCI regulator as proposed in [82].

As mentioned in Section 2.8, for synchronous frame computation, the ac quantities in a natural frame are converted to dc quantities using the following transformation [81]:

id iq  = 2 3. cos(θ) cos(θ − 2.π 3 ) cos(θ + 2.π 3 )

sin(θ) sin(θ −2.π3 ) sin(θ + 2.π3 )  .   ia ib ic   (3.1)

As a result, the PI controller can introduce an infinite gain for the dc quantities obtained. Since the IBDG PE interfaces are modeled as CC-VSIs in both normal and fault con- ditions, the modulation parameters of the PWM modulator are set using a current control loop based on the inverter current references. For this purpose, the d-axis and q-axis components of the inverter output current are compared with the corresponding current

references, and the difference is fed into a simple PI regulator. With consideration of the voltage drop across the inverter output filter, the inverter voltage components are obtained in d-q frame that rotates synchronously with the angular speed of the grid ω, as follows:

vq = Riq+ L diq dt + Lωid+ vpccq (3.2) vd= Rid+ L did dt − Lωiq+ vpccd (3.3)

where vd, vq, id, and iq are the d-axis and q-axis components of the inverter output voltage

and current, respectively; vpccd and vpccq are the d-axis and q-axis components of voltage

at the point where the inverter is connected to the grid; and R and L are the output filter components.

As shown in Figure 3.1, the d-axis and q-axis current components of inverter output current are compared with the corresponding current references and the difference is fed to a simple PI regulator. The steady state d-axis and q-axis components of the inverter

s K K i p s K K i p Vrefq d ref V q pcc d q L I V RI    + + + + d pcc q d L I V RI    d I q I q ref I + + - - d ref I

Figure 3.1: Current controller block diagram [84]

control voltage can be obtained in frequency domain as follow [84], [85]:

Vref −q = RIq+ LωId+ Vpccq+ Kp(Iref −q− Iq) + Ki(

Iref −q− Iq

s ) (3.4)

Vref −d= RId− LωIq+ Vpccd+ Kp(Iref −d− Id) + Ki(

Iref −d− Id

s ) (3.5)

3.2.1

Normal Operation

During normal operation, the IBDGs can be controlled to operate either as a PQ or PV generator. The PQ mode at unity power factor is chosen in this work since based on IEEE std. 1547, DGs are expected to operate at unity power factor and are not allowed to regulate the voltage at their point of common coupling [86]. However, the mode of operation of the IBDG during normal condition is independent of its FCM operation during fault condition. To operate the IBDG as PQ generators during normal operation, the active and reactive power injection of these units are controlled using the CC-VSI interface. The d-axis and q-axis components of the IBDG output current are separately controlled to follow their reference values, irefd and irefq. These two components of the IBDG current

are responsible to provide the desired active and reactive power injected by the unit. Active and reactive components of power can be represented in terms of d-axis and q-axis components of voltage at the PCC and injected currents [83]:

p = 3

2(vpccdid+ vpccqiq) (3.6)

q = 3

2(vpccqid− vpccdiq) (3.7)

Choosing the d-axis component of voltage aligned with the grid voltage angular position, d-axis and q-axis voltage components are obtained as: vpccd = Vpcc and vpccq = 0.

To provide the desired operation at unity power factor, the d-axis and q-axis compo- nents of the current references are obtained:

irefd = 2 3 Pref vpccd (3.8) irefq = 0 (3.9)

where Pref is the active power reference which is considered as a constant value for a

period of operation, during normal and fault condition [87]. This reference power can be either provided by the utilities, in case of energy storages, or determined by the control unit of dc-dc converter of connected PE interfaces to track the maximum power point of renewable resources. It should be noted that, in the later case, in order to guarantee the system stability, the speed at which Pref is provided by the maximum power point tracker

3.2.2

Operation during Fault Condition

When a fault is detected, IBDG operation is modified in order to manage the total system fault current. The idea is to keep IBDGs connected to the system during a fault and employ them to manage the excessive fault current contribution of DGs. Similar control strategies are employed for IBDGs during both normal and fault conditions. The only discrepancies are the current references of the CC-VSIs applied to the system. When a fault is detected in the system, current and voltage information available from the smart meters is used to calculate the magnitude and phase angle of the IBDG reference current, which enables the desired FCM operation. The d-axis and q-axis components of the reference current during the fault condition can therefore be obtained as follows:

irefd = ˆIsin(φ) (3.10)

irefq = ˆIcos(φ) (3.11)

where ˆI is the magnitude of the IBDG reference current that is normally kept below the current threshold of the PE switches, and φ is the reference current phase angle, which is the main IBDG control parameter for the FCM operation.

It should be noted that in order to avoid damage to the PE interfaces the magnitude of current references is limited to the rating of semiconductor switches. Given by inverter manufacturer, the current rating of semiconductor switches vary from 1 to 4 times the rated current [5], [88] with the most common values are reported as 2-3 times the rated current [89], [90]. With a constant current magnitude, the current phase angle is the controllable parameter that determines the IBDG contribution.

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