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Discusión de Resultados

EVOLUCIÓN DEL PRECIO M2 CONSTRUIDO VS INDICE DE MATERIALES DE CONSTRUCCIÓN PERIODO 2000-

C. Tercer modelo con precios reales, periodo 2001-

IV. Aplicación Empírica: Modelo Estructural

4.1 Discusión de Resultados

Instruction distribution describes which instructions impact the thread’s execution time and thus, impact the original processor mapping discussed in Section 3.3.2. For example, at compile time it may be determined through the instruction flagging stage that a thread performs both floating point and integer division, but the execution ratio between the two operations may be 10:1. Therefore, when deciding between a MicroBlaze with an integer division co-processor and one with a floating point unit only, knowing this information can help determine where best to schedule this thread. In this case, suffering the loss of integer division on the latter processor to address the floating point instructions that dominates the thread’s execution is the correct decision.

To test this, instruction distribution was manually added to a slave’s meta-data profile managed on the host at runtime. This distribution was found by running the thread shown in Figure 4.2 on a MicroBlaze that contains any of the necessary co-processors the thread may require. While this is a manual procedure, it should be noted that it can be incorporated in runtime through a combination of thread execution history and performance profiling features offered within the MicroBlaze. At the time of this writing however, such features in the MicroBlaze exist but do not work reliably to provide confidence in the profiling data it captures.

The thread in Figure 4.2 contains a finite amount of shifting operations, coupled with floating point operations encapsulated within the body of a loop. If it is assumed that both types of operations that make use of their respective hardware execute in a similar amount of time, it can be concluded that the floating point operations have the potential to dominate this thread’s execution time. To demonstrate this, this thread was first mapped to a processor based on only the number of instructions generated by the compiler through the instruction flagging stage. In this case, 18 32-bit shifting operations as the values being shifted are 64-bits each and 2 floating point operations. As a result, the runtime system automatically gives more weight to the processor that contains a barrel shifter. For the system shown in Figure 4.1, processor #3 contained a barrel shifter unit, and processor #0 and #1 contained a floating point units. Alternatively, if the

1 t y p e d e f s t r u c t { 2 H u i n t max ; 3 H u i n t s h i f t n u m ; 4 } v o l a t i l e f p u s h i f t t ; 5 6 v o i d ∗ f p u s h i f t t h r e a d (v o i d ∗ a r g ) { 7 f p u s h i f t t ∗ d a t a = ( f p u s h i f t t ∗ ) a r g ; 8 H u i n t max = d a t a −>max ; 9 H u i n t s h i f t n u m = d a t a −>s h i f t n u m ; 10 H u i n t i = 0 ; 11 v o l a t i l e f l o a t sum = 0 . 0 F , temp = 2 . 0 F ; 12 13 v o l a t i l e Hlong m = 0 x1 , j = 0 x2 , k = 0 x3 , l = 0 x7 ; 14 15 / / F i n i t e number o f s h i f t i n g o p e r a t i o n s 16 m = m >> s h i f t n u m ; 17 j = j >> s h i f t n u m ; 18 k = k << s h i f t n u m ; 19 l = l << s h i f t n u m ; 20 21 / / V a r i a b l e number o f f l o a t i n g p o i n t o p e r a t i o n s 22 f o r ( i = 0 ; i < max ; i ++) { 23 / / F l o a t i n g p o i n t m u l t i p l i c a t i o n 24 temp ∗= temp ; 25 / / F l o a t i n g p o i n t a d d i t i o n 26 sum += temp ; 27 } 28 29 r e t u r n (v o i d ∗ ) SUCCESS ; 30 }

Figure 4.2: Instruction example: the floating point instructions may be dominant depending the number of times the for-loop executes.

Instruction Distribution Example

Scheduling optimization Processor Execution Time (µs)

Scheduling based on static number of compiled instructions 3 663

Scheduling knowing the distribution of compiled instructions 0 85

Table 4.4: Results of executing a thread that includes an uneven distribution of shifting operations (18) and floating point operations (2400).

scheduler maps the thread to processor #0, a faster execution is observed for the thread as given in Table 4.4. This is true as long as the floating point operations dominate the thread’s execution time.

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