EFECTOS DE LA ABSTINENCIA SEXUAL EN EL ORGANISMO HUMANO

The first system constructed is represented schematically in figure 5.6. All timing for clocking waveforms is derived from a 24 MHz crystal oscilliator and the circuitry can be run at 8, 4, 2, 1 and 0.5 MHz pixel clocking rates (8 MHz being the normal video rate).

4

Figure 5.5a) (upper) 12-Bit CCD readout system with sensing head fibre- optically coupled to Photochron IV streak camera phosphor and b) (lower) 8-Bit imaging system showing camera head and framestore.

The drive circuitry is very similar to the circuitry found in the EEV P4310 camera with slight modifications to enable slow clocking to be performed. Variable video gain was provided at the capacitively coupled output and the signal was sent in part to a video driver for monitor display and to a sample-&-hold amplifier before being input to the 12 bit A-to- D converter. The CCD chip was mounted separately from the driver unit as small stand alone detecting head. By this means various P8602 CCD arrays could undergo evaluation and in particular streak images could be recorded employing either lens or fibre-optic coupling. Transfer . frequency selection g Adjust 4 . iMHz I 256 e 0.5 2® 1 0 On® Offo Pseudo -interlacing CCD Video Camera D C. level Adjust I Video ▼ Signal 384

(pixel/line) _{General purpose} computer with graphics 12 Bit A / D Digital Port V 12 Frame Store

iiiiiii

T

Figure 5.6 Block diagram of 12-bit image digitisation system To achieve CCD image digitisation requires a fast data conversion rate coupled with a facility for dumping the digitised data into a large block of memory, often termed a frame store. The frame store is necessary since currently available computers have insufficient speed to read in the image information at the data conversion rate of the A-to-D. In other words the bottleneck in data transmission is at the input port of the computer. This situation is changing with the appearance of 32-bit processor computers, SCSI based I/O ports and

16/32 bit DMA cards, but cost is still prohibitive for most laboratory based applications.

To digilisc a full frame (288x385 pixels) to 12-bit precision in a time sufficiently short before pixels become swamped by dark current (§5.6) requires a conversion rate of better than 1 Mllz at room temperature. A review of the available converters was first made and this is summarised in table 5.1. The A-to-D purchased was the HAS 1201, a hybrid device manufactured by Analog Devices which has maximum conversion rate of 1.1 MHz. Input fsd voltages are 5 or 10 V and outputs are IT L compatible. The circuitry built around the device allowed two digitisation modes where either 256 or 385 pixels per line were digitised. This facility was provided since external memory size was initially limited but this was soon overcome with the availability of high density dynamic RAM memory chips. Once enabled by the frame store or readout device the digitisation circuit would wait for the next TV field before conversion commences and then signals the start and finish of a line digitisation by the toggling of a status line. A variable DC offset voltage can be applied to the input signal for masking dark current levels. The digital output is presented to the rest of the readout system via a buffered 25-way D-type port.

Table 5.1 Fast 12 bit A-to-D converters available Maanufacturer / serial no. Type and output Speed

compatibility (MHz) Analog Devices:

MOD 1205 Modulo-TTL 5

CAV 1220 Module ~ ECL 20

CAV 1202 M odule-TfL 2 HAS 1201 Hybrid-TTL 1.1 HAS 1202 H ybrid-T fL 0.6 Burr Brown: AD 600 Hybrid-ECL 10 Micro Network: MN 5247 Monolithic-TfL 2 MN 52245A Monolithic-TfL 1

I

5.3.2 12-IUT FRAME STORE AND COMPUTER CONTROL INTERFACE

The complete frame 385 x 288 12-bit data is transfered to 256 KBytes of dynamic RAM at the 1 MHz rate. 'Fhe data is stored in two parts - an 8-bit word representing the

98

99

eight most significant numbers of the data and the lower numbers are recorded as 4-bit information. The memory buffer is interfaced to a 8 MHz IBM AT clone (ITS X86) via

three 8 bit input/ouput ports (Intel 8255 I/O card). The computer graphics driver is an EGA § high resolution card giving a two page display of 640 x 350 pixels and 16 colours, this is | j; adequate for most graphical display of the stored data. Programs were written in Turbo

Pascal (version 4.0). Frame transfer and subsequent analysis is controlled from the keyboard by a series of single keystrokes selected from a menu. Total access time for digitisation of a full frame, transfer to buffer and then to computer RAM is around 6 seconds. The 1 Megabyte of computer RAM can allow several frames to be stored and manipulated at once. A series of graphics procedures are included to display the image data including a colour pixel map which displayed the intensity level of each pixel using a 16 level pseudo gray scale and a three dimensional plotting program which displays the intensity values in the horizontal and vertical directions as is shown in figure 5.7. The data shown, a two dimensional sine function, was generated in the computer for testing purposes. Stored frames can be dumped onto hard disc and read back. Full cursor control is provided in both display modes to allow the selection of single vertical or horizontal lines

? and the subsequent plotting of intensity versus position (figure 5.7c).

I

5 .3 .3 VIDEO LINE CATCHER •

A very compact video line-catcher was also built as a useful complement to the CCD | driver and digitiser. This device has two 8 Kbyte memory chips and a 12-bit D/A converter

allowing the access of a total of 16 TV lines in the 384x12-bit data format to be displayed

on a simple oscilloscope and hard-copied on a chart recorder. The starting line number in a | frame and the line spacing between adjacent lines to be caught can be selected

independently thus allowing all parts of the CCD image area to be accessed.

There are several facilities provided by the line-catcher. Firstly, when combined with the CCD driver and A/D converter, it represents a compact 2-dimensional readout system which does not require any peripheral frame store or computer for graphical display. Secondly, even if a frame store and computer are available, use of the semi-realtime

i F f a n e s t o r e i n p u t ■ R e a d f i a n e i n f r o m d i s k U t i t e f t a n e o u t t o d i s k C o l o u r b i t n a p 3D i n t e n s i t y p l o t s i n c . d a t r e a d i n F t a n e s t o t e i n p u t R e a d f r a n e i n f r o n d i s k W r i t e f r a n e o u t t o d i s k C o l o u t b i t n a p 3 0 i n t e n s i t y p l o t s i n c . d a t t e a d i n

Figure 5.7 Demonstration of graphical software with computer generated sine function intensity pattern: (upper) Pseudo-grey scale, (middle) intensity vs X-Y and (lower) intensity cross-section.

a₉

. ' Ï

function of the line-catcher, which constantly updates the displayed video line on the scope, allows optimisation of CCD video gain and D.C. offsets on the A/D converter to ensure that the dynamic range of the CCD lies within the voltage range of the converter. Thirdly, this device represents an excellent trouble-shooting system which permits rapid fault-finding in the readout system and this is particularly important in the case of a relatively complex CCD driver/frame-stor^computer configuration.

5.4 8-Bi t i m a g i n g s y s t e m