El Abencerraje y la guerra de las Alpujarras

Figure 7.12: MC14052BD demultiplexer connections schematic in ZenPPG.

7.5 Demultiplexing and Sample & Hold

As mentioned in the previous sections, the signal generated by the photodiode is a continuous sequence of Red/Infrared light switching. The typical signal at the output of the transimpedance amplifier can be seen in Figure 7.10, where the switching sequence can be noticed by three different voltage levels corresponding to the three cycle periods.

Since this signal is mixed, time separation of the signal in the respective wavelengths is required. In order to achieve this, the ZenPPG employs analogue demultiplexers.

Analogue demultiplexers are devices, which are commonly used in conjunction to mul-tiplexers. In an opposite fashion compared to multiplexers, demultiplexers receive one input line and separate it into several output lines. Similar to multiplexers, demul-tiplexers are composed of internal switches, which are directly controlled by logical ports.

The ZenPPG employs a separate MC14052BD as demultiplexer. Figure 7.12 shows the schematics of the demultiplexer’s connections. The outputs of the transimpedance amplifiers of both channels (MIXED0 and MIXED1) are connected to the inputs of the demultiplexer. The logical controls MUX0, MUX1 and SMP INH0 are provided by the microcontroller and control the sequence of the outputs for each channel (RAW0 n and RAW1 n, for n = 1...3).

The process can be thought as the opposite of time multiplexing showed in Section 7.2, where the truth table in Figure 7.3b controls the demultiplexer outputs, depending on the state of the logical controls A, B, and INH. Figure 7.13 graphically illustrates the process of time demultiplexing achieved for the output of the transimpedance amplifier.

7.5. Demultiplexing and Sample & Hold

Figure 7.13: Illustration of the input, outputs, and logical controls of the demultiplexer during two consecutive cycles. MIXED0 is the output of the transimpedance amplifier and the input of the demultiplexer. A (MUX0), B (MUX1), and INH (SMP INH) are the logical controls. The input signal MIXED0 is time demultiplexed in X0, X1, and X2.

In this scenario, when the logical controls close the internal switches of the demulti-plexer, the input is transmitted to corresponding output of the demultiplexer. If the logical controls of the multiplexer and demultiplexer are synchronous, the separation of the three different sequence of light switching is possible (i.e. red wavelength ON, Infrared wavelength ON and both wavelengths OFF).

However, demultiplexing an entire segment of the transimpedance amplifier’s output could introduce some inaccuracies. At the margins of each segment, there are big voltage transitions, which should not be sampled. Moreover, the introduction of the feedback capacitor Cf in the transimpedance amplifier’s output create a transient re-sponse during each transition (see Figure 7.11). In order to achieve an adequate quality in the PPG signal, these features of the intermittent transimpedance amplifier’s output should be avoided.

The sampling in the entire segment is solved in the ZenPPG by only demultiplexing the central part of each segment. This is achieved by dividing each segment into four equal sub-segments (total of twelve sub-segments for each cycle Red ON, IR ON, Dark). The sampling is only performed in the two central sub-segments, while the other ’peripheral’

sub-segments are avoided. Figure 7.14 shows the output/inputs of the demultiplexer when only the central part of each period is sampled. While the clocks A and B do not change compared to the traditional situation in Figure 7.13, the clock INHIBIT changes

7.5. Demultiplexing and Sample & Hold

Figure 7.14: Illustration of the input, outputs, and logical controls of the demultiplexer during a single cycle.

MIXED0 is the output of the transimpedance amplifier and the input of the demultiplexer. A (MUX0), B (MUX1), and INH (SMP INH) are the logical controls. The input signal MIXED0 is time demultiplexed in X0, X1, and X2 only in the central part of the period (Red ON, IR ON, or Dark), when INH is in a low state (see truth table in Figure 7.3b).

to a low status (sampling) only in the central part of the period. The implementation of this division can be seen in the multiplexing/demultiplexing code in Appendix A, where the programming of the microcontroller was divided in twelve (4 by 3) different instructions.

The process explained above shows how the mixed raw PPG signal is time-demultiplexed (or simpler, split) into red and infrared signals. However, the output of the demulti-plexer illustrated in Figure 7.14 are intermittent voltage pulses produced by the tran-simpedance amplifier output. Even though these pulses have high frequencies (i.e. in the order of few hundred Hertz switching frequency), they may not retain the voltage to the next cycle, with the consequent degradation of the PPG signal. Therefore, a sample and hold circuit is needed in order to retain the voltage until the next cycle.

The sample and hold circuit is a circuit composed of a switch, a capacitor, and an operational amplifier. The positive input of the op-amp is connected to the capacitor, while the negative input is feed-backed to the op-amp’s output. The switch is con-nected to the capacitor and closes intermittently, passing a certain voltage. When the switch is closed, voltage is passed to the op-amp input and feed-backed to the op-amp’s output. During this period, the capacitor charges. When the switch is released, the capacitor holds the charge and it keeps providing the voltage at the op-amp’s input.

7.5. Demultiplexing and Sample & Hold

Figure 7.15: Sample and hold circuit in ZenPPG. The output of the demultiplexer is connected to the input of the op-amp and a capacitor C1 to hold the voltage. When the switch (i.e. demultiplexer) is closed, the voltage RAW0 0 is passed to the op-amp output while the capacitor C1 is charged. When the switch is opened the capacitor C1 continues to discharge to the op-amp input.

This configuration allows a slow discharge of the capacitor due to the low input bias currents of op-amp and a high output impedance (or low OFF currents) of the switch.

In the ZenPPG, the sample and hold circuit is implemented by a capacitor and an op-amp connected to the output of the demultiplexer (switch). Figure 7.15 shows the sample and hold circuit adopted in the ZenPPG. The signal from the demultiplexer (switch) is connected to the positive input of an op-amp (OP484FSZ) and a capacitor C1. The negative input of the op-amp is feed-backed to the output. Each output of the demultiplexer is passed to separate circuits as in Figure 7.15, in order to sample and hold dual-wavelength PPG.

Once the signal is sampled and hold, the PPG signal needs to be filtered before being acquired by National Instruments Data Acquisition systems. Thus the output of the sample and hold circuit is connected to a low-pass RC filter. The filter has a cut-off frequency of 79.5 Hz in order to remove unwanted high-frequency noise from the signal and to restrict the signal bandwidth to avoid aliasing in the analogue-to-digital conversion. Remaining noise is filtered digitally after analogue-to-digital conversion.

The filter is followed by a pre-acquisition voltage buffer. Figure 7.16 shows the sample and hold circuit, the low-pass filter and the voltage buffer.

7.5.1 Evaluation of time demultiplexing and Sample & Hold

Figure 7.17 shows the output of the transimpedance amplifier output of signal acquired from the forehead. The voltage reference was set at 1 V, transimpedance amplifier gain