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El financiamiento de la ciencia y la tecnología

B. en ellos excesivamente el financiamiento, ya que

constants: the value of an expression (of any type) may be bound to a name.

The value of the expression is evaluated at compile time and the type of the name when used will be the same as the original expression in the constant declaration. Numbers can be given in decimal (starting with one of 1..9), hexa- decimal (0x prefix), octal (0 prefix) and binary (0b prefix).

arrayed channels: procedure ports and locally declared channels may be

arrayed. Each channel can be referred to by a numeric or enumerated index, but from the point of view of handshaking, each channel is distinct and no indexed channel has any relationship with any other such channel other than the name they share. Arraying is not part of a channel’s type.

for loops: aforloop allows iteration over the instantiation of a subcircuit. The composition of the circuits may either be a parallel composition – as in the example above – or sequential. In the latter case, “;” should be substituted for “||” in the loop specifier. The iteration range of the loop must be resolvable at compile time.

A more flexible approach uses parameterised procedures and is discussed later in chapter 11 on page 193.

9.5.

Ancillary Balsa tools

9.5.1

Makefile generation

Makefiles are commonly used in Unix by the utility make(1) to specify and control the processes by which complicated programs are compiled. Speci- fying the dependencies involved is often tedious and error prone. The Balsa

system has a utility,balsa-md, to generate the Makefile for a given program automatically. The generated Makefile knows not only how to compile a Balsa module with multiple imports, but also how to generate and run test-harnesses for the simulation environment, LARD, used by Balsa. Balsa-mgrprovides a convenient, intuitive, GUI front-end tobalsa-md and considerably simpli- fies project management, in particular the handling of multiple test harnesses. However, since a textual description of any GUI is tedious,balsa-mgrwill not be discussed further and only the facilities to which the underlyingbalsa-md provides a gateway will be described in the examples that follow. The interface presented bybalsa-mgris shown in figure 9.6.

Figure 9.6. balsa-mgr IDE.

9.5.2

Estimating area cost

The area cost of a circuit may be estimated by executing the Makefile rule cost. For example, an extract of the output produced for the 2-place buffer is shown below:

Part: buffer2

(0 (component "$BrzFetch" (8) (10 2 9))) (0 (component "$BrzFetch" (8) (8 6 7))) (0 (component "$BrzFetch" (8) (5 4 3)))

(20.75 (component "$BrzLoop" () (1 11)))

(99.0 (component "$BrzSequence" (3) (11 (10 8 5))))

(198.0 (component "$BrzVariable" (8 1 "x1[0..7]") (9 (6)))) (198.0 (component "$BrzVariable" (8 1 "x2[0..7]") (7 (4))))

Total cost: 515.75

The exact format of the report produced is somewhat obscure. Each line corresponds to a handshake component. Its area cost is the first number on the line. The parameters after the component name correspond to the width of the various channels of that component and the internal channel names. The area reported is proportional to the cost of implementing the circuit in a particular silicon process and is of most use in comparing different circuit descriptions.

9.5.3

Viewing the handshake circuit graph

A PostScript view of the handshake circuit graph can be produced by run- ning the rulemake ps. A (flattened) view of the handshake circuit graph for the example buffer.2c is shown in figure 9.7.

The two single-place buffers from which the circuit is composed are recog- nisable in the circuit. Apart from minor differences in the labelling of the handshake component symbols, the circuit is identical to that shown in fig- ure 8.6 discussed in section 8.4 on page 128 and the same optimisations have been (automatically) applied.

9.5.4

Simulation

Ignoring the various simulation possibilities available once the design has been converted to a silicon layout, there are three strategies for evaluating and simulating the design from Balsa:

1 DefaultLARDtest harness.

The command make sim will generate aLARD test harness and run it. The test harness reads data from a file for each input port of the module under test. Data sent to output channels appears on the standard output. This method needs no knowledge ofLARDat all.

2 Balsa test harness.

If a more sophisticated test sequence is required, Balsa is a sufficiently flexible language in its own right to be able to specify most test se- quences. A default LARD test harness can then be generated for the Balsa test harness. Again no detailed knowledge ofLARDis required. 3 CustomLARDtest harness.

buffer2c activate . C1: @10:18 0 i o # C10: @13:3 0 1 # C4: @13:3 0 2 x[0..7] ; C15: @14:11 0 1 T C14: @14:7 0 1 . C12: @15:7 1 2 C2: i 1 C13: x 0 2 T C11: x 1 1 x[0..7] C7: x 0 2 ; C9: @14:11 0 1 T C6: @15:7 0 2 C8: @14:7 0 1 C3: o 2 C5: x 1 1 C16: @27:18 0 2

For some applications, it may be necessary to write a custom test harness inLARD. The Makefile generated test harness may be used as template.

The default test harness exercises the target Balsa block by repeatedly hand- shaking on all external channels; input data channels receive the value 0 on each handshake, although it is possible to associate an input channel with a data file.

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