EQUIPO DE TRABAJO MESA 4 ALBERGUES EQUIPO

Wet chemical pre-treatments using HCl and plasma pre-treatments using Ar and Ar/H2 plasma have been studied. X-ray photoelectron spectroscopy (XPS) study

into HCl treatments showed that an InCl3 surface layer, previously observed in the

literature for treatments in inert atmosphere, only forms in ambient atmosphere when the HCl is diluted in isopropanol and rinsed in isopropanol. This layer sig- nificantly desorbs when the substrate temperature is raised from 200°C to 250°C. In electrical measurements, the InCl3 layer was associated with a large shift in flat-

band voltage (VF B) relative to the control without HCl treatment (+0.79 V). When

the effects of desorbing InCl3, the VF B change was reversed but all figures of merit

deteriorated. HCl treatments were found not to improve interface-trapped charge density (Dit) relative to the untreated control but hysteresis voltage (VH) was im-

proved from 1.4 V to a minimum of 1.1 V, with increased deposition temperature causing both figures of merit to deteriorate.

If InCl3 were to be taken further as a route to manipulate flatband voltage, its

stability and reproducibility would require further study. In addition to slow/partial desorption at 200°C, the layer may not be stable with further thermal processing and additional study would establish its stability. The chemical states and physical inter- facial layers in MOSCAPs could also be further investigated using XPS, to ascertain bonding configurations after deposition, and using high-resolution cross-sectional transmission electron microscopy (TEM) to image the dielectric-semiconductor in- terface, potentially also using energy-dispersive X-ray spectroscopy (EDX) and/or electron energy loss spectroscopy (EELS) to study composition. Furthermore, alter- native wet treatments, such as ammonium hydroxide, hydrofluoric acid and tetram- ethylammonium hydroxide may offer superior MOSCAP response to HCl alone, or as additional steps in a multiple-step wet cleaning process (e.g. the RCA clean). Further XPS studies may offer particular insight, showing removal of contaminants and resulting reaction products of specific wet treatments. It may also be appropri- ate to perform the treatments under inert atmosphere in a glove box and transfer to the XPS instrument under inert atmosphere to prevent the products/contaminants under investigation from oxidising.

Plasma pre-treatments were found to consistently cause deterioration in InSb- Al2O3 MOS capacitors. DC leakage current increased for both Ar and Ar/H2 plasma

pre-treatments, preventing many devices from being characterised by C-V methods. Some increases in Dit were observed following plasma pre-treatments, whereas, for

VH, Ar plasma treatment gave increased VH but an Ar/H2 treatment gave a VH

consistent with the untreated control sample. Plasma pre-treatment causedVF B to

increase in all cases but a larger change was observed for devices which underwent ALD at the University of Liverpool than at the University of Warwick - this change may be related to contamination or processes requiring further optimisation. Fur- ther process trials may establish whether the detrimental effects are specific to the process parameters or general to plasma treatments on InSb and XPS may reveal physical/chemical mechanisms associated with degradation.

Further changes were observed between the control samples deposited using the different facilities and between a thermal ALD process at 200°C and a plasma- enhanced ALD process (using O2 plasma as an oxygen precursor) at 100°C. Sam-

ples prepared at the University of Warwick had higher DC leakage current, VF B

closer to 0 V and increased hysteresis - this may be related to process optimisation. The plasma-enhanced process produced significantly lower DC leakage current and higher oxide capacitance, consistent with a higher oxide density, slightly reduced

Dit, slightly increased VF B and slightly decreased VH. Further study is required to

Post-deposition Annealing

7.1

Introduction

Post-deposition annealing is a standard, widely-employed technique in the field of Si-SiO2 interfaces but is less frequently explored in III-V materials. In addition to

the potential benefit available through post-deposition annealing, the low melting point of InSb presents constraints and challenges (the material may partially or completely break down below its melting point).

As such, a systematic study into the annealing on InSb metal-oxide-semiconductor capacitor (MOSCAP) structures was performed and is presented here. The study uses a relatively small volume of samples to begin to chart the ‘parameter space’ - the multidimensional space of temperature, time, gas, flow rate etc. - for InSb annealing, identifying regions where the material breaks down and regions where device performance can be improved. A wide range of parameter space is covered in moderate detail to identify regions which merit more detailed investigation and optimisation. The anneal processes presented here are post-metallisation anneal processes: by depositing and patterning the gate metal before dicing, annealing and characterising, fabrication overheads could be reduced and a larger number of samples studied.

7.2

Experimental Methodology

Three 2” (∼50 mm) Te-doped n-type wafers of InSb with a carrier concentration of approximately 8×1014 cm−3 n-type were loaded into an Oxford Instruments OpAL ALD reactor, without pre-treatment, where they received 10 nm of Al2O3 at 200°C

as an Al-first process. Following oxide deposition, the samples were degreased using acetone and isopropanol and 1µm of Al metal was deposited in an SVS electron

beam evaporator to serve as a gate contact. The gate metal was pattered using AZ 9260 photoresist as a mask and Microposit MF-319 photoresist developer (dilute tetramethyammonium hydroxide) as an etchant.

The wafers were then diced into 1 cm square samples and treated with a range of annealing processes. A Carbolite tube furnace was used with three anneal gases, each maintained at a flow rate of 100 sccm: N2, O2 and forming gas (‘FG’, a mixture

of 5% H2 and 95% N2 by volume). The furnace was pre-heated to each process

temperature, the samples each loaded into an alumina crucible and inserted directly into the furnace. When the samples were unloaded, the crucible was withdrawn and deposited into a larger alumina crucible to cool in air at room temperature - the temperature ramp rate up and down was not directly controlled and the samples were exposed to air while still close to process temperature. Samples were annealed for a range of times between 5 mins and 10 hrs, at a range of temperatures between 200°C and 500°C. One sample from each wafer was retained as a control sample, receiving no anneal treatment.

After annealing, each samples was mounted to a sample carrier printed circuit board (PCB) using GE varnish and wire bonded to the PCB using Al bond wires. These sample PCBs were then mounted to a Cu carrier block using GE varnish and loaded into a Leybold RDK 10-320 cryostat for characterisation at 80 K. Current- voltage (I-V) measurements were performed using a HP 4145 parameter analyser, an Agilent 4155C parameter analyser and a Keithley Sourcemeter and capacitance- voltage (C-V) measurements were performed using an Agilent E4980A LCR me- ter, at frequencies between 1 kHz and 2 MHz. Data analysis was used to extract interface-trapped charge (Dit) by the Terman and conductance methods, flatband

voltage (VF B) and hysteresis voltage (VH), as well as frequency dispersion in ac-

cumulation, as described in sections 4.3, 4.5 and 5.2.2. This data is presented in sections 7.4, 7.5 and 7.6 as box plot distributions. For most samples, between five and nine devices were measured - as this sample size is too small to reliably apply statistical hypothesis testing methods, estimations of significance are made based on the interquartile range and the intersection thereof between samples.

A typical C-V from a control sample is shown in figure 7.1. The Dit for the

control sample was 1.2×1012 cm−2eV−1, the average VF B was -1.05 V, the average

VH was 1.38 V and the average frequency dispersion was 1.4 %dec−1.

Specific results of interest at high anneal dose, including cross-sectional trans- mission electron microscopy images, are discussed in section 7.3. General results, including identification of optimal anneal regimes, are discussed in sections 7.4, 7.5 and 7.6.

-4 -2 0 2 4 0.0 0.2 0.4 0.6 0.8 1.0 N o r m a l i s e d C a p a c i t a n c e ( C / C M a x ) Voltage (V) 1kHz 5kHz 10kHz 40kHz 80kHz 100kHz 200kHz 400kHz 600kHz 800kHz 1MHz 2MHz

Figure 7.1: Typical multifrequency capacitance-voltage response from MOSCAP devices without annealing