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Figure 5.24: The EPC GaN enhancement mode HEMT structure [102].

Currently, GaN HEMTs are still an immature technology. However, a few companies have commercialised some GaN HEMT devices. Efficient Power Conversion (EPC) has introduced an enhancement mode GaN HEMT (Normally off device). These devices are packaged in passivated die form (Flip chip technology) with solder bumps as terminals, hence they are currently only available as surface mount packages. Fig. 5.24 presents the known device structure of the GaN enhancement mode HEMT. It is a lateral device with the active GaN layer grown on a silicon wafer with aluminium nitride used as an isolation layer. The EPC enhancement mode HEMT was designed to behave like a conventional power MOSFET, with a required minimum gate bias to turn on the device. It even has an intrinsic body diode which behaves in a similar manner to the body diode of a power MOSFET but operates via

a different mechanism (unipolar conduction). During reverse bias, withVGS= 0 V, the gate becomes positively biased compare to the drain which turns on the device. This means the GaN HEMT can only block voltage applied at the drain terminal. Unlike the MOSFET, the gate is not isolated from the channel which results in a higher gate leakage. It is also known to have a negative temperature dependence, meaning lower temperature would decrease the gate threshold voltage in contrast to a silicon MOSFET.

A 200 V, 12 A GaN HEMT (EPC1010) was chosen for cryogenic measurement. Due to the bare die form of the device, it was soldered on to a printed circuit board (PCB) to create electrical connections. In order to ensure good thermal conduction, the back of the die is held in thermal contact with the copper cold-head with a thin layer of silicone thermal pad in between, this is illustrated in Fig. 5.25.

PCB Solder bump Copper traces Die Thermal pad Cold head

Figure 5.25: The electrical and thermal connections with the GaN die during characterisation.

The temperature dependent forward IV characteristics of the GaN HEMT atVGS= 5 V is presented in Fig. 5.26(a). The device improves at lower temperatures and exhibits no sign of degradation or non-ohmic effects even down to 20 K. This is expected from the temperature independent two dimensional electron gas density of the channel. The extracted on-state resistance is presented in Fig. 5.26(b). The on-state resistance reduces at lower temperatures but appears to saturate at temperatures below 50 K. The on-state resistance is five times higher at room temperature than at 20 K, However this includes the measurement errors from the additional resistance caused by the PCB connections. The measured gate threshold voltage of the device is presented in Fig. 5.26(c). As expected, the gate threshold voltage decreased with decreasing temperature; from∼1.3 V at room temperature down to∼0.25 V

at 20 K. The same effect occurs in MOSFETs at high temperature. It is important to note that at such low gate threshold voltage, there is a real danger of parasitic turn-on from voltage spikes or even noise on the gate terminal. Although such effects are generally mitigated at cryogenic temperatures.

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0 2 4 6 8 10

Drain source voltage, V_DS (V)

Drain source current, I

DS (A) 294 K 250 K 200 K 150 K 100 K 50 K 20 K Decreasing Temperature

(a) Forward IV characteristics atVGS= 5 V (b) On-state resistance

0 50 100 150 200 250 300 0 0.2 0.4 0.6 0.8 1 1.2 1.4 Temperature, T (K)

Gate threshold voltage, V

Gth

(V)

(c) Measured gate threshold voltage

Figure 5.26: The temperature dependent (a) forward IV characteristics atVGS= 5 V, (b) the extracted on-state resistance and (c) the measured gate threshold voltages.

The temperature dependent IV characteristics of the reverse Schottky diode are pre- sented in Fig. 5.27(a). The turn-on voltage of the Schottky diode followed a similar negative temperature dependence to the gate threshold voltage. The diode turn-on voltage saturates at temperatures below 100 K. It also exhibits negative resistance when the current rises be-

yond ∼2 A. Fig. 5.27(b) presents the measured temperature dependent breakdown voltage taken at ISD '250 µA. The breakdown voltage is ∼34% lower at 20 K compared to room temperature. The breakdown voltage at room temperature was lower than the rated break- down voltage which means the device could have degraded during the soldering process. The breakdown voltage at 100 K was higher than expected from the trend of the temperature curve. This could be due to a measurement error.

0 0.5 1 1.5 2 0 2 4 6 8 10

Source drain voltage, V_SD (V)

Source drain current, I

SD (A) 294 K 250 K 200 K 150 K 100 K 50 K 20 K Decreasing temperature

(a) IV characteristics of the reverse Schottky diode

0 50 100 150 200 250 300 100 110 120 130 140 150 160 170 180 Temperature, T (K) Breakdown voltage, V BD (V)

(b) Measured breakdown voltage

Figure 5.27: The temperature dependent (a) IV characteristics of the reverse Schottky diode and (b) the measured breakdown voltages.

5.3

Power Schottky Diodes

Power Schottky diodes have the potential to achieve lower power loss than PiN diodes at cryogenic temperatures. This is because the conductivity of the diode is dependent on unipolar conduction which improves at lower temperatures. The turn-on voltage of the Schottky diode is also lower than the turn-on voltage of the PiN diode which would result in a lower voltage drop. Furthermore, the turn-on voltage of a Schottky diode can be controlled by the Schottky barrier height, which is dependent on the metal type, dopant concentration of the semiconductor and interface conditions; all of which can be precisely controlled during fabrication. In terms of the reverse behaviour, edge terminations are commonly added to

improve the breakdown voltage by spreading the electric field so that the junction does not breakdown prematurely, this also reduces the reverse leakage current. However, how this influences the cryogenic behaviour of power Schottky diodes is uncertain since data on their cryogenic behaviour has not been found in any literature. Therefore, it is the aim of this section to present the measured cryogenic behaviour of several silicon power Schottky diodes. The cryogenic behaviour of gallium arsenide and silicon carbide Schottky diodes is also presented.