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You can use the ncx_wave_rise and ncx_wave_fall attributes to specify a user

sensitization vector sequence for timing arcs. The following syntax specifies a sensitization vector for a timing arc:

ncx_wave_rise : inpin1 bits inpin2 bits ... outpin1 bits ; ncx_wave_fall : inpin1 bits inpin2 bits ... outpin1 bits ;

The ncx_wave_rise and ncx_wave_fall attributes are placed inside the timing group that

represents a timing arc. During timing arc characterization, the vector sequence is applied to the cell under characterization. The following example shows a few timing arcs of a D flip-flop in the cell template.

pin D { direction : input ; timing { related_pin : CK ; timing_type : setup_rising ; ncx_wave_rise : \ D 11000011 \ CK 01101001 \ Q 01 ; ncx_wave_fall : \ D 00111100 \

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Chapter 3: Template Files

Sensitization 3-53 CK 01101001 \ Q 10 ; } pin Q { direction : output ; timing { related_pin : CK ; timing_type : rising_edge ; timing_sense : non_unate ; ncx_wave_rise : D 11000111 CK 01101101 Q 01 ; ncx_wave_fall : D 00111000 CK 01101101 Q 10 ; } }

Liberty NCX checks for compliance with the following rules when you specify a vector inside of an arc group definition.

• Vectors used to sensitize constraint models, such as setup and hold or recovery and removal, should have two associated inputs toggling successively in the last three bits or after the reference edge, as shown in the following example:

D 11000011 CK 01101001 Q 10

• For a setup or recovery arc, the related pin should be toggling last, and the constraint pin should be toggling just before the related pin.

• For a hold or removal arc, the constraint pin should be toggling last, and the related pin should be toggling just before constraint pin.

• For minimum pulse width arc vectors, the last three bits of a related pin should be toggling as 010 or 101. All other toggling inputs should be stable in the same time period. For example,

D 001110000 CK 011011010 Q 10

• For delay arcs, the ncx_wave_fall output should be falling, and the ncx_wave_rise

output should be rising.

• Check for the complementary_pin condition of the related pin or constraint pin; and, if present, ensure that the complementary pin vector is inverted.

• If a when condition is specified inside a timing arc, the when condition should be consistent with the vectors specified.

• Valid combinations should exist between timing type, timing sense, and the output transition, as shown inTable 3-5 on page 3-54.

Table 3-5 Valid Combinations Between Timing Type, Timing Sense, and the Output Transition

Timing type Timing sense

positive_unate negative_unate non_unate

combinational R->R,F->F R->F,F->R {R,F}->{R,F} combinational_rise R->R F->R {R,F}->R combinational_fall F->F R->F {R,F}->F three_state_disable R->{0Z,1Z} F->{0Z,1Z} {R,F}->{0Z,1Z} three_state_enable R->{Z0,Z1} F->{Z0,Z1} {R,F}->{Z0,Z1} three_state_disable_rise R->0Z F->0Z {R,F}->0Z three_state_disable_fall R->1Z F->1Z {R,F}->1Z three_state_enable_rise R->Z1 F->Z1 {R,F}->Z1 three_state_enable_fall R->Z0 F->Z0 {R,F}->Z0

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Sensitization 3-54

• Consistency checks are done between the output vector, timing_type attribute, and

timing_sense attribute in the arc to make sure the vector is a valid combination, as shown in Table 3-5.

• For sequential arcs, the following consistency checks are done between the

timing_type attribute and the specified vectors:

• rising_edge, if the reference edge on the related input is a rising edge.

• falling_edge, if the reference edge on the related input is a falling edge. • preset, if the arc has an ncx_wave_rise group and does not contain only an

ncx_wave_fall group.

• clear, if the arc has an ncx_wave_fall group and does not contain only an

ncx_wave_rise group.

• hold_rising and removal_rising, if the related pin is rising and it is transitioning before a constraint pin.

• hold_falling and removal_falling, if the related pin is falling and it is transitioning

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Sensitization 3-55

• setup_rising and recovery_rising, if a setup check is to be done on clocked elements, and the related pin is a rising edge.

• setup_falling and recovery_falling, if a setup check is to be done on clocked elements, and the related pin is a falling edge.

• No syntax checking is done for vectors specified inside the sensitization block.

Some complex sequential cells might require lengthy sensitization vector sequences to set certain internal state elements to required values. If needed, you can guide or specify the initial conditions of the arc simulation by using the ncx_ic and ncx_nodeset attributes.

Liberty NCX converts these attribute values to HSPICE .IC and .NODESET commands, and places them inside the simulation deck. These directives affect the simulation as follows. • .NODESET sets the seed value of a node for DC convergence, but DC convergence may

change the node value if needed.

• .IC holds a node to a fixed value throughout the entire DC convergence process.

By setting the initial conditions of internal state elements to known values, it might be possible to use shorter sensitization vector sequences.

Each directive contains a list of one or more pairs of node names and node values:

ncx_ic : node1 value1 [node2 value2 [...]] ncx_nodeset : node1 value1 [node2 value2 [...]] }

The node name specifies the name of the node inside the cell subcircuit. Node names with special characters, such as colons, should be enclosed in double quotes. The value must be a floating-point number between 0 and 1 inclusive, and specifies the initial condition voltage value as a function of the voltage swing for that node. A value of 0 results in a zero voltage initial condition, and a value of 1 represents a full-rail voltage initial condition.

Place the ncx_ic and ncx_nodeset directives inside the timing arc group. These directives

affect both the rising and falling arc directions. Alternatively, you can specify separate rising and falling arc conditions with the ncx_ic_rise, ncx_ic_fall, ncx_nodeset_rise, and ncx_nodeset_fall attributes. For example,

timing { related_pin : CK ; timing_type : rising_edge ; timing_sense : non_unate ; ncx_wave_rise : D 11 CK 01 Q 01 ; ncx_wave_fall : D 00 CK 01 Q 10 ;

ncx_ic_rise : "int_node:1" 0 "int_node:2" 1 ; ncx_ic_fall : "int_node:1" 1 "int_node:2" 0 ; }

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In the previous example, the resulting HSPICE .NODESET directives set the specified nodes to their required initial values, then the sensitization vectors defined with the ncx_wave_rise

and ncx_wave_fall attributes are applied.

It is also possible to specify initial condition values without sensitization vectors. In this case, the arc is sensitized using automatic sensitization vector generation. However, the automatic sensitization does not make use of any information from the initial condition attributes. The simulation simply applies the resulting initial condition directives for DC convergence, then applies the automatically-generated sensitization vector sequence.

Note:

When the ncx_ic* and ncx_nodeset* attributes are used with shortened initialization

vector sequences, make sure that downstream tools are compatible with the shortened

wave_rise and wave_fall vector sequences published in the output library. If needed,

set the sensitization_to_library configuration variable to false.