MÓDULO FORMATIVO 4

In this section, we will describe the experimental issues at stake, such as allowing PES probing while applying in situ bias for the sample, and how the micro-fabrication was designed to answer these issues. The studied heterostructure was designed to be electrically connected. To conduct such experiments on metal/ferroelectric interfaces, several issues have to be tackled: • The interface has to be as free of contamination and as sharp as possible. The best

solution is the growth of the full structure in the same ultra-high vacuum chamber. • The interface must not be too deeply buried so that the photoemission signal from the

interface buried under the thin electrode is still significant. Using soft X-ray (∼1 keV), the probing depth is of 3-4 nm whereas hard X-ray (above 5 keV) can probe 10-20 nm. • The capacitor area must not be too small so that the photoemission signal comes only from the interface of interest. The size of the capacitor will thus have to be at least equal to the beam spot size on the sample (typically in the order of ∼(100 × 100) µm2₎ • The capacitor area must not be too large so that leakage currents due to defects are

minimized. Indeed leakage is known to increase with the capacitor size, so we have to keep the latter at its minimum, while still fulfilling the previous requirement.

• The electrical connections must be compatible with an ultra-high vacuum (UHV) envi- ronment in terms of vacuum contamination. The sample manipulation must also remain possible under UHV conditions.

The heterostructure has been designed according to those constraints. The heterostructure is a BTO thin film, with a bottom electrode of SRO deposited onto a STO substrate, and a set of several SRO top electrodes. SRO is chosen since it can epitaxially grow on BTO and it provides screening via free carriers charges and via ionic displacements. Similar samples were also prepared for the studies presented in chapter 4.

The two first issues have been resolved by growing the full heterostructure in a unique deposition chamber. For the SRO/BTO/SRO capacitors the top electrodes thicknesses are 2 nm. These electrodes are much thinner than the probing depth of 10-20 nm, accessible in hard X-ray photoemission spectroscopy.

To address the issues of biased photoemission, the metal/ferroelectric/metal structure, has to be carefully designed. The starting point is a (5 × 5) mm2_{, planar sample. In photoemission} spectroscopy, signal from small areas can be measured by using a small beam spot focused on the region of interest. At a synchrotron facility, such as SOLEIL, several beamlines offer photoemission end-stations with beam spots of width of ∼(100 × 100) µm2_{. This is the case} for the GALAXIES beamline. Therefore, by adding a margin of error which takes into account the tail of the beam, we chose (300 × 300) µm2 _{as the area of a capacitor. With such large} electrodes, it is likely that defects inducing high leakage current, for example high conduction channels through grain boundaries, occur randomly for some capacitors. This is the reason why we chose to fabricate twenty independent capacitors per sample to ensure that at least some of them have a low enough defect concentration for FE stability.

Once this dimension problem is settled, the next step is to design a system which can be electrically connected to different ultra-high vacuum manipulators and is suitable for photoe- mission spectroscopy. The final design is presented in Figure 3.1, with a schematic side view of the device.

Experiments are performed using HAXPES. Therefore, the thickness of the top electrode cannot exceed 10 nm if we want a sufficient signal to noise ratio from the buried interface. In fact, the top electrode prepared was chosen even thinner, and provided continuous conductive films. These thin top electrodes cannot hold any wire and an intermediate stage has been de- signed to allow an easy connection. This has been done by the deposition of a thicker layer of metal, overlapping a small part of the top electrodes, which will serve as a connecting pad. It can then be connected by micro-wiring to the sample holder. Moreover, the metal pad has to be electrically separated from the ferroelectric layer to avoid disturbing the electrical properties of

Figure 3.1 – Schematic side view of the connected SRO/BTO/SRO heterostructure.

the capacitor. This is the last feature of the design: an intermediate, highly insulating, dielec- tric layer is inserted between the pad and the ferroelectric to limit, at best, parasitic behaviors. The pad is 300 nm thick and made of palladium because of its good conduction properties and excellent compatibility with micro-wiring. The intermediate dielectric is 100 nm thick and made of Al2O3 because of its highly insulating properties.

The sample was prepared in the Institut d’Electronique Fondamentale, Orsay (France). The three layers of SRO (2 nm), BTO (60 nm) and then SRO (35 nm) thin films were grown on a SrTiO3 (001) (STO) substrate using PLD. Prior to film growth, the STO substrate was cleaned using buffered HF solution and rinsed in deionized H2O, followed by annealing under oxygen atmosphere to obtain a clean, atomically flat, TiO2 terminated, STO surface [171].

To perform in situ bias studies, both the top and the bottom electrodes need to be accessible to be connected, while ensuring proper isolation of the BTO from the connecting wire.

The full microfabrication of the sample consists of a series of several photolithography pro- cesses, and can be resumed in five mains steps presented in figure 3.2.

Step 1: This is the initial state of the lithography process. The layers of SRO, BTO and finally SRO were successively deposited by PLD.

Step 2: A first step of optic lithography was used to pattern the full electrode top layer in 20 identical (300 × 300) µm2 _{pads. Photolithography, also termed optical or UV lithography, uses} light to transfer a geometric pattern via a photomask to a light-sensitive chemical photoresist on the film. Then, a series of chemical treatments either engraves the exposure pattern into, or enables deposition of a new material in the desired pattern upon the material underneath the photo resist. Photolithography is used because it can create extremely small patterns (down

Figure 3.2 –Side (top) and top (bottom) view of the sample throughout the 5 main steps of the lithography

process used to prepare our heterostructure. The SRO top electrode (blue) is patterned to form 20 pads, then 20 pads of Al2O3 (dark grey) are added, and finally 24 pads of palladium (purple) are superposed to connect the

sample.

to a few tens of nanometers in size), and affords exact control over the shape and size of the objects it creates.

Figure 3.3 –First step of the lithography process of the full heterostructure micro fabrication. Figures marked

1 and 2 correspond to the one presented in Figure 3.2.

This first lithography step is detailed on figure 3.3. In this case, the wafer is covered with photoresist by spin coating (green on the figure 3.3 b)), producing a layer between 0.5 and 2.5 µm thick. The photo resist-coated wafer is then prebaked to drive off excess photoresist solvent. After prebaking, the photoresist is exposed to a pattern of intense light. The exposure to light causes a chemical change that allows some of the photoresist to be removed by a special solution, called "developer" by analogy with photographic developer (figure 3.3 c)). We used positive photoresist which becomes soluble in the developer when exposed, with a mask where only the regions for 20 pads were exposed. The resulting wafer is then "hard-baked" to solidify the remaining photoresist, to make a more durable protecting layer during the etching. In et- ching, the SRO is removed in the areas that are not protected by photoresist (figure 3.3 d)).

Finally, a solvent, or resist stripper, is used to remove the remaining photoresist (figure 3.3 e)). The result of this lithography was thus 20 electrode pads, as we can see on the step 2 of Figure 3.2.

Step 3: Using a second optical lithography process, a set of 20 Al2O3 pads was deposited over the top electrodes. Each Al2O3 pad is overlapping its corresponding top electrode pad over 5 µm. This step will provide an electrical isolation between the BTO and the palladium pads deposited in the step 5. Al2O3 was thus deposited on top of the all sample and a lithography process identical to the one performed in Step 2 was used to pattern it.

Step 4: To electrically connect the sample, this latter layer was etched in order to give access to the bottom electrode on each of the four corners of the sample. To do so, we performed a lithography using negative photoresist making unexposed regions soluble in the developer. The principle is the same as in step 2, with the difference that the resist will be activated on the whole surface except on the 4 corners of the sample. We then etched the sample through the BTO to access the bottom SRO before removing the remaining resist.

Step 5: A fourth and final step of lithography with positive resist was performed to deposit the palladium. Similarly as in step 2 and 3, we evaporated palladium onto the entire surface of the sample and used lithography to shape this layer into the desired pattern. As a result, a set of 20 palladium pads was deposited over the Al2O3 and the top electrodes, with an additional 4 pads over the four accesses to the bottom electrode in the corners of the sample. Each palladium pad is overlapping its corresponding SRO electrode over 5 µm (i.e. it is overlapping the Al2O3 by 10 µm). This way, it allows electrical contact while remaining isolated from the BTO. Moreover, this configuration leaves most of the surface of the electrode free to perform XPS on the electrode and on the BTO below, without probing the Pd or the Al2O3.

Figure 3.4 shows a top view of the micro-fabrication mask used for those 5 steps. The position of the 20 SRO top electrodes are presented in blue, and the four additional rectangular patterns in the corner used to connect the bottom electrode in pink. The overlapping Pd pads used for connexion are green on the picture. The mask also presents the lithography alignment marks - the crosses near the edge of the sample - used to properly align the mask for each lithography step.

Finally, each one of the top/bottom electrode pairs was electrically tested (as presented in section 3.1.2). The pad which has shown the best electrical response was connected to the sample holder using gold micro-wiring. Figure 3.5 shows a top view of the connected sample as a) a simplified schematic and b) a photography. On the photography, we can clearly distinguish

Figure 3.4 – Top view of the mask used during the lithography steps of the micro-fabrication.

the 20 SRO top electrodes and the 4 accesses to the bottom electrode on the corners of the sample. On the connected pad (bottom right of the sample), we can also see the gold wire going outside of the sample, towards the sample holder, where it was connected to the voltage supply.

Figure 3.5 – a) Simplified schematic and b) photography of the connected SRO/BTO/SRO heterostructure.