MANEJO Y TRATAMIENTO:

Of particular importance, in the context of realising a man-portable device, was the need to eliminate the personal computer (used for image display) from the system. This has been the prime objective of the work reported in this thesis. To this end, a stand-alone image acquisition system has been realised which itself comprised two key subsystems: the image acquisition / hardware control electronics and a stand alone LCD module. In chapter 2 we outlined preliminary investigations into LCD drive technology, and implemented a high-end Microchip Technology DSPic to drive the system. It was discovered early on that it was impractical to drive the LCD module directly from the DSPic (or other microprocessor) due to the dynamic nature of the LCD “memory” which needed constant refreshing, therefore placing a prohibitive overhead on processor power. We therefore implemented a dedicated LCD driver chip from EPSON, which included the required video RAM, a simple 8-bit interface to the

technologies. It was ascertained that in every area, save price, the characteristics of the STN display were inferior to that of the TFT display. The STN display lacked contrast and, crucially, was unable to render rapidly animated graphics (i.e. video) without severe ghosting of the image from one frame to the next. In contrast, the TFT display yielded crisp, high contrast images with virtually no frame to frame ghosting. At only a moderate increase in cost, it was apparent that the TFT display was the technology of choice for this project, and the flexibility of the EPSON LCD driver chip employed meant that both technologies could be rapidly evaluated.

The evaluation system constructed during the work phase outlined in chapter 2 also comprised of analogue and digital I/O in order to interface to control the scanning electro-mechanical hardware. Whilst this circuitry was tested in order to establish correct operation it was not implemented as the evaluation system was also able to mimic the host PC previously used with the scanning controller which was realised previous to the onset of this research project. In this way it was possible to rapidly evaluate LCD modules without having to repeat previous work. It also led to a change in design philosophy whereby a more modular approach was taken to the image acquisition and image display design. It was realised that by separating the two functions into separate modules a stand alone image display module would be realised which had potential utility in a broad range of future applications, not simply limited to this particular mid-infrared imaging system. Such a design approach led to the work carried out in chapter 3.

The work carried out in chapter 3 was therefore split into two parts: the image acquisition electronics and the display module. The image acquisition system previously realised before the onset of this project, whilst functional, had several limitations in terms of speed and flexibility. The board was redesigned with much improved architecture to facilitate faster movement of data between its peripherals, and a larger memory chip used to facilitate image acquisition at higher spatial resolutions. Whereas previously system timings and image resolution changes required reprogramming of the supervisory PIC, in the new design these parameters could be changed in real time thanks to a bank of on board DIP switches. Due to the similarity in functionality of the new design and old, and in order to minimise development time, the same mid-range PIC processor was used to control the board. The

frames / sec over the previous speed of 6 frames / sec. The possibility of replacing the expensive galvanometer (used for y-scan) with a geared stepper motor was investigated. Whilst the electronics proved successful, mechanical backlash within the gearing mechanism meant that proper registration was lost in the vertical plane between successive frames. Whilst it may be possible to replace the galvanometer with a stepper motor / gear box at a later date, this avenue of investigation was not pursued due to the pressures of time.

A fully stand alone LCD module was realised whose interface was “transparent” to the host processor, and which sat in parallel with the on-board RAM chip. The LCD module interface was effectively a cartesian address map (8 bits of x- and y- axis data) and an 8-bit data bus, of which only the upper 6 bits were used yielding a display with 64 shades of grey. Once the address and data bus had been set, the data was clocked into the module on a single _CS_ pin, therefore mimicking the operation of a

RAM chip in write mode. The module utilised a state-of-the-art dsPIC to handle the incoming data from the interface and manipulate it such that it can be fed to the on-board LCD control chip in the minimum of time. The time taken after taking the clock pin low to a pixel point being displayed was ~5

s, yielding a maximum frame rate of 13 fps assuming a resolution of 150x100 pixels. The modular nature of the LCD module, coupled with the extremely simple digital interface, meant that the device has great potential to find utility in applications beyond those considered in this thesis.

Finally, the commercial constant current laser diode drive instrumentation and dual-channel temperature controller were replaced with a single, bespoke design which had the ability to be driven from a single rail battery power supply. A high-current op-amp was used in transimpedence mode to generate the constant current, which had a maximum drive ability of 8 A. Many features were added to ensure safe operation of the laser diode; namely soft-start, hard- and software maximum current drive limits, protection diodes in both forward and reverse bias across the laser diode to trap transients and finally short-circuit relays mounted in both the drive electronics and in the laser head. The output stage operated in the conventional transconductance configuration with a low impedence resistor in series with the load (i.e. the diode), across which a constant voltage was maintained in order to effect a

A simple digitally-based proportional, integral and differential algorithm was developed from the literature in order to realise a dual-channel temperature controller to stabilise the laser diode and nonlinear crystal temperature. The diode temperature was stabilised in order to maximise the overlap between the diode emission wavelength and the peak absorption manifold in the laser gain medium. Since the wavelength of the down-converted illumination radiation is dependent upon the nonlinear crystal temperature, this component was stabilised in order to maintain maximum contrast between the presence and absence of methane in the acquired image. The host PIC microcontroller was programmed in C in order to take advantage of floating point arithmetic, mandated by the PID algorithm. The output to the two peltier controllers was via a highly efficient PWM output stage, each channel being controlled by a direction (i.e. heat / cool) line and an on / off line. In order to minimise the effects of noise, the temperatures of the respective laser diode and nonlinear crystal mounts were digitised by converters within the laser head and transmitted digitally to the host controller. The setpoint temperatures, maximum allowable diode current and PID parameters were stored within the laser head on an electrically erasable programmable read only memory (EEPROM), thereby allowing any particular laser module to be used with any other laser management system. The total current ripple on the laser diode was measured at 3 mA, and the temperatures of the respective optical components was stabilised to within 50 mK, yielding a wavelength stability of 0.02 nm (9.1 GHz) and 0.08 nm (2.2 GHz) from the laser diode and nonlinear crystal, respectively.