Standby power consumption of PASA, ADC and DSP are reported in table 5.2; digital pads consume negligible power because they are not switching. During acquisition and readout, DSP core and digital pads consume more power, as re ected in gure 5.16 and table 5.3.
Diagram 5.15 shows the percentage contribution of each block to the total power consumption. Clearly, the analog part, especially the ADC, consumes much more power than digital functionalities.
Power pulsing tests have been executed, using the Smart Shutdown fea- ture introduced in paragraph 5.1.1: the biasing circuits of PASA and ADC are turned o, while sampling clock and readout clock are disabled.
Power domain Power/channel Total power PASA 10.26 164 ADC analog 31.28 500 ADC digital 1.71 27 Digital Core 4.04 65 Chip total 47.3 757
Table 5.2: Standby power consumptions of the dierent power domains, ex- pressed in mW.
Figure 5.15: Percentage power consumption of the dierent blocks.
Figure 5.16 plots the power consumption of the DSP during a typical power pulsing cycle. Initially the system is in Smart Shutdown, and the power consumption is only due to leakage currents. At some point, the system is powered up: biasing circuits are activated, and clocks are enabled. After a given delay (in the plot it is 100µs), a Level-1 trigger is sent and an acquisition starts; afterwards, also a Level-2 trigger is sent, and readout is performed.
The most interesting feature of a power pulsing cycle is the minimum applicable delay between power up and L1 trigger. Any system takes some time to recover from shutdown mode into full operation, and this time sets the limit on power pulsing frequency and power consumption.
The readout procedure also takes a considerable amount of time, which should be minimized. This and other considerations concerning the test
Power up
L1 trigger Acquisition
window
Readout
Figure 5.16: Transient power consumption of the DSP, during a power pulsing cycle.
system are detailed in the nal notes below.
In order to measure the minimum delay between power up and L1 trigger, a pulse with xed amplitude has been sent during the acquisition window, while executing power pulsing cycles. Many acquisitions have been run, with dierent values of the delay; the acquired pulse height is plotted in gure 5.17, as a function of the delay.
Figure 5.17: Acquired height of a test pulse, with dierent delays between power up and Level-1 trigger. The last (red) measure is taken in continuous
Power domain Smart Shutdown (mW) Power pulsing cycle (µJ) PASA 2.12 145.2 ADC analog 6.88 421.1 ADC digital ≈0 22.9 Digital Core 0.16 58.3 Digital Pads ≈0 6.9 Total 9.2 654.3
Table 5.3: Power consumption of the dierent power domains during Smart Shutdown, and energy consumption during one power pulsing cycle.
mode, without implementing power pulsing cycles.
The gure shows that, with a delay as low as 75µs, the pulse height is acquired correctly: the power pulsed acquisition diers from a continuous acquisition by less than 1 ADC count. Therefore, a safe delay of 100µs between power up and L1 trigger is chosen for power pulsing measurements.
Power consumption plots, similar to 5.16, have been acquired for all power domains. The calculated integrals of the power during a power pulsing cycle are reported in table 5.3.
During Smart Shutdown, leakage currents produce a power consumption of 9.2mW. During a power pulsing cycle similar to that of gure 5.16, a total energy of 654.3µJ is required.
As a consequence, implementing power pulsing cycles with a frequency of 50Hz, as in the CLIC accelerator, the Super-Altro Demonstrator consumes:
PCLIC = 9.2mW + 50Hz · 654.3µJ = 41.9mW (5.1)
Implementing power pulsing cycles with the 5Hz pulse train frequency of the ILC accelerator, the power consumption is:
PILC = 9.2mW + 5Hz · 654.3µJ = 12.5mW (5.2)
Compared with the 757mW power consumption in continuous mode (table 5.2), power pulsing using the smart shutdown mode gives power reductions of a factor 18.1 for CLIC, or 60.6 for ILC. For low pulse train frequencies (ILC), leakage currents absorb a dominant fraction of the total power.
Final notes on power pulsing
Looking at gure 5.16, one can see that the length of a power pulsing cycle is about 1ms; most of this time is spent for readout, which is controlled by the RCU ( gure 5.1). During readout, PASA and ADC are unuseful but still active, and consume most of the power; therefore, the readout time needs to be minimized.
The size of one Multi-Event Buer is 10kbit per channel, or 20kbyte for 16 channels; this can be readout in just 100µs at a readout frequency of 40MHz (the bidirectional bus has 40 bits), or in 50µs at 80MHz. Therefore, the present RCU does not fully exploit the speed capabilities of the S-Altro. With a speed-optimized RCU rmware, the readout could theoretically be much shorter, and therefore decrease the power consumption. Moreover, with a new rmware, PASA and ADC could be turned o at the end of the acquisition window, while the DSP is still active to perform readout. The proposed scheme is represented graphically in gure 5.18; if PASA and ADC were active for just 150µs per cycle, a reduction of the energy per cycle (table 5.3) of a factor 5 is expected. Power up L1 trigger Readout 100us time Acquisition window 25us Shutdown PASA ADC Wait 100us Shutdown DSP Smart shutdown Smart shutdown
Figure 5.18: Proposal of a power pulsing scheme, with optimized timing for low power consumption.
Another important point is that the measurements have been executed without using Zero Suppression, that is, memories have been completely lled with data to be readout. Depending on the application, using ZS, the memories could store much less data; therefore the readout time and power consumption could be consistently reduced. The values given in table 5.3 are therefore based on conservative assumptions, and will be much better in real detector applications.
In some detectors, it may be necessary to keep the preampli er always active, in order to provide a DC bias to the detector pads also during shut- down. In this case, the 164mW required by the PASA will dominate the power consumption.