By improving the representation of nodes in the graph using vectors, by removing the tag on the graph nodes leaving a code pointer as the first field of a graph node, by
representing data structures as functions, and by representing numbers, characters, and Booleans as algebraic data objects, the Spineless G-machine became the Spineless- Tagless G-machine [Peyton Jones and Salkild 1988a, 1988b, and 1989; Clack 1999]. All closures have a uniform representation and the type of a closure no longer needs to be examined as the code pointer points to appropriate code for the closure type. The Spineless Tagless G-machine was fully specified in [Peyton Jones 1992 and unpub.].
6·2·15 GRIP
The Graph Reduction in Parallel (GRIP) hardware architecture [Peyton Jones et al.
1987; Peyton Jones et al. 1989; Hammond and Peyton Jones 1990; Mattson 1993a and 1993b; Akerholt, Hammond, Peyton Jones, and Trinder 1993] consists of processing elements and Intelligent Memory Units (IMUs). Groups of processing elements are connected to an IMU. The IMUs are connected by a bus network. GRIP provides the impression of a shared-memory by distributing the globally-addressable heap amongst IMUs; control is centralised at the system manager which could be any processing element. Parallel graph reduction is undertaken in the same manner as in the Spineless-Tagless G-machine [Mattson 1993a]. Threads are located in a runnable thread pool. Sparks (created through the use of par and seq annotations) are located in a spark pool.
Sparks may be conservative or speculative. The evaluate-and-die thread creation model is used. Some recent experimental results are reported in [Hammond et al. 1994]. The result of combining the GRIP architecture less the IMUs with the Spineless- Tagless G-machine plus some extensions is GUM — which was presented in Chapter Five.
6·2·16 Partridge’s Contribution
Partridge [Partridge 1991] investigated the simulated parallel evaluation of functional language programs that incorporated speculative evaluation in the context of shared memory machines. The abstract machine comprises four concurrently executing processes: an incoming message processor, a graph reducer, a load distributor, and an outgoing message processor. The graph reducer uses a prioritised scheduler with scheduling priorities (also) ranging from mandatory–irrelevant but irrelevant threads are killed and physically removed during garbage collection (in a manner similar to that
Chapter Six: Related Work suggested by Grit and Page [Grit and Page 1981]). There is no concept of a separation between sparks and threads: annotated expressions result immediately in threads. More is said about Partridge’s simulator in Sections 6·3·7 and 6·4·10.
Partridge’s conclusions include two points. Firstly, he concludes that multiple levels of speculative priority are necessary for good performance; the implementation discussed in Chapter Seven conforms to this. Secondly, Partridge concludes that the ideal model of priorities will vary from problem to problem with some requiring a greater range of priorities than others.
6·2·17 The ν-STG Machine
A further evolution of the STG-machine is the ν-STG machine for which a simulator has been written [Hwang and Rushall 1992]. The relevant differences between the two machines are the additions to the ν-STG machine of:
• an annotation to indicate that an expression may be evaluated in parallel and that this evaluation should occur immediately;
• closure locks to indicate evaluation-in-progress; and
• closure indirections to indicate the remote location of a closure.
In fact, all of these items are already extant in GUM. The fork annotation essentially
provides the functionality supplied by the first item. The alteration of entry code in a GUM closure when a thread enters facilitates closure locking. Finally, global addresses are already in place to act as input and output closure indirections.
6·2·18 Mattson’s Contribution
In his doctoral thesis [Mattson 1993a], Mattson describes a shared memory implementation (thus omitting load distribution) of a functional language with a pervasive emphasis on minimising the impact of speculative evaluation on those tasks that are evaluating mandatory threads. This aim is made easier due to the de-coupling of processing element and memory.
The implementation is based on the GPH language evaluated using the Spineless- Tagless G-machine in an early version of GHC. Two thread pools are utilised: a runnable mandatory thread pool, and a prioritised runnable speculative thread pool.
Unlike the implementation described here, no delayed sparking is implemented and speculative threads immediately have the same memory requirements as mandatory threads.
Mattson focused on three areas (also done here):
• minimising the impact on mandatory threads by attempting to shift the burden of speculative overhead to tasks executing speculative threads;
• generating sufficient speculative parallelism to occupy all processing elements; and
• implementing speculative evaluation in an efficient manner by attempting to gain performance in excess of the overhead introduced.
He defined the creation of a speculative thread as initiation and the creation of a mandatory thread as spawning. No such distinction is made here as there is little difference in the result — the former thread has a lower priority than its parent while the latter has the same priority as its parent, in all other respects the created threads are the same.
More on Mattson’s speculative evaluation scheme can be found in Section 6·3·9. Mattson concluded through experimentation that speculative evaluation on a
multiprocessor can be effective provided the overhead of speculation is absorbed by tasks executing speculative threads.