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HVDC converter. In this case, the dc valve blocking control ac- tion and the order to the TCR occurred simultaneously.

The results of these three TNA studies are illustrated in Figures b,

and c, respectively. The phase a-to-neutral voltage on the bus is shown in all three pictures. The valve-blocking action (load rejection) oc- curred at the fifth voltage zero from the left.

HVDC

Fixed Filter Capacitor

F I G U R E 15. System used to study load rejection overvoltages at a HVDC converter 1982

3.4. Static Compensators

F I G U R E 16. Load at the HVDC converter terminal. Traces show HVAC volt- age 1982 IEEE. Without compensa- tion. With compensator regulating volt- age normally. With compensator receiv- ing a signal demanding full inductive current. T h e signal is derived from the converter as blocks dc conduction.

The subsequent peak voltages are tabulated in Table 1. When the mpensator reacted via its automatic voltage regulator (Case it was nable to reduce the first and second peaks. When given an

e signal from the dc controls (Case the compensator was able to ce those peaks. In both cases when the compensator was in service, e overvoltage was reduced significantly. A compensator with a greater ductive rating could have limited the overvoltage even further. The in the example was more than fully utilized and temporarily operated ve its normal voltage control range.

urated-Reactor Compensator with Fixed Capacitor

d-reactor compensators generally do not employ an electronic control em. Nevertheless, there is a small delay in their response, so that the ling time following a disturbance is comparable to that of systems with R compensators, being of the order of 1-2 cycles, depending on the namic properties of the ac system. The response delay is also

3.4. Static 153 Reactive Power Compensation and Dynamic Performance

TABLE

Load Rejection Overvoltage Example on T N A

1 2 3

No Normal AVR Coordinated Time Compensation Control Control

(Cycles) V Peak V Peak V Peak

Oa _{0.95 0.95 0.95} 0.25 1.27 - 1.2 1.11 1.75

+

1.65 1.65 1.2 1.25 - 1.65

-

1.32 1.27 1.75

+

1.27

+

1.01 0.90 2.25 - 1.52 - 1.08

-

1.01 2.75

+

1.33 1.01

+

1.08 Sustained 1.33 1.02 1.02

= when dc blocking occurred, at about the fifth voltage zero of phase a the oscillograms.

slightly by its natural time constant, just as the TCR is slowed by its small phase-control gating delay.

Thyristor-Switched Capacitor As described in Chapter 4, the thyristor-switched capacitor consists of several banks of shunt capacitors, each of which is connected or disconnected, as needed, by thyristor itches. The TSC has a control system that monitors the voltage. hen the voltage deviates from the desired value by some preset error eadband) in either direction, the control switches in (or out) one or ore banks until the voltage returns inside the deadband, provided that not all the capacitors have been switched in (out). Figure 17 shows the ponse locus for a system disturbance that tends to cause a voltage op. Assuming a TSC with zero, one, or two capacitor banks, operating oint a would prevail with normal conditions and one bank connected. the beginning of the disturbance the voltage would drop to point b un- the TSC control switches in the second bank to bring the voltage up to It is important to note that because of the nature of the TSC ontrol, the compensating current can change only in discrete steps as a esult of control action. In high-voltage applications the number of shunt apacitor banks is limited to a small number (say, three or four) because f the expense of the thyristor switches. As a result, the discrete steps in ompensating current may be quite large, giving somewhat coarse control. is the fact that the capacitors can be connected to the influenced by the damping circuit in parallel with the series-co

e voltage wave when the stored voltage on slope-correction capacitor. That damping circuit is necessary to

ly equal, to the instantaneous system voltage. subharmonic instability (see Chapter 4, Section

delay which can be as much as one cycle (see As in the case of the TCR compensator, the ability to limit overv

ages is determined by the inductive rating of the saturated reactor,

The TSC by itself is incapable of limiting large transient overvoltages this is limited by the voltage rating of the slope-correction capacitor

xcept by switching itself off. It has the advantage of then being able to may be protected by a parallel spark gap set to a voltage correspondi

say, three times normal rated current. Even when the spark gap circuits the slope-correction capacitor, the reactor itself retains a fai

characteristic (typically 8-15% slope) up to a much current. The overload capability of the reactor is limited in magnitude the insulation requirements and the forces on its windings, and in du

by its thermal capacity. For cases with the series-connected slop correction capacitor installations utilizing spark gaps, the gaps genera1 need a bypass switch which closes when they operate and reopens whe normal voltage is restored.

For small or large disturbances which tend to cause a voltage reduc- tion, the saturated-reactor compensator operates as shown in Figure For small disturbances resulting in a voltage rise it reacts similarly to the

FIGURE 17. Effect TSC compensator on operating TCR in accordance with Figure 11. The saturated reactor is slowed

Reactive Power Compensation and Dynamic Performance 3.4. Static Compensators stand by in readiness to help control synchronizing power swings follo

ing the disturbance (see Section 3.4.2 of this chapter).

Combined Thyristor-Controlled Reactor and Switched Capacitor.

always in service with filter reactors to absorb the harmonic cur caused by the phase control action of the TCR. The TCR and the filter capacitor bank constitute configuration 1 in Figure 18.

characteristic for configuration 1 is shown in Fig

In document Departamento de Infraestructuras (página 117-122)