CAPÍTULO II. MARCO TEÓRICO
2.5. SECTOR PESQUERO EN ECUADOR
a) GEC make CAG-34 type
:-This relay is designed for applications where sensitive settings with stability on heavy through faults is required.
It consists of Main and Check zone element.
During through faults, the voltage developed across the relay is V = If (Rct + 2R1)
Where If = Fault current (in secondary) Rct = Internal resistance of CT at 75oC R1 = Cable resistance
EEC recommended that the operating current lop (primary) setting should be less than 30% of the minimum fault current and should be more than 130% of full load rating of heavily loaded circuit.
Once ‘V’ is known, one can adjust the relay circuit and ensure that the relay operating voltage is slightly above this value. This is achieved by means of stablising resistor SR in series with a current operated relays.
SR is computed by the formula.
SR = (V/lop)-[VA burden of relay)2/lop)]
The range of current settings ; 10-40% of In.
Stabilising resistor :0-200 Ohms.
The resistor setting may require change depending on fault level of the busbar.
It is provided with VTX31 type supervision relay which guards against faults and opening in CT secondary windings & bus wires and issues and alarm after time delay of 3 sec.
b) GEC make PBDCB relay
:-It is static scheme with main and check zone. :-It is five zones relay i.e. we can protect five different sections of busbar. It operating time is 5 m Sec. It consists of
(i) Static high impedance differential relay PVHN161 (both for main and check zone each)
(ii) Static bus supervision relay PVHD 161.
(iii) Bus shorting relay module RWH161.
Range for voltage setting ‘Vs’ : 100-348 in 32 equal steps 2 ---
4 ---
8 ---
16 --- Vs = (25 + Vs) x 4 Volts 32 ---
Supervision relay
:-Setting range :- 2-14 Volts continuously adjustable.
Trip relay is energized in operation of both the main and check zone relay.
Supervision relay PVHD161 supervises the CT open circuits and raises an alarm and shorts the differential relay.
PBDCC is same as PBDCB but provided with built-in Auto-test facility.
1.6.3.3:Low impedance biased differential relays :- Principle.
An alternative to the high impedance protection described above is the biased differential relay. This type of protection makes use of the fact that during system conditions that give rise to high spill current (namely, heavy through faults), there is high amount of circulating current as well between the in-feeding and out-feeding CT secondaries. The operating quantity in the scheme is the same as before – the secondary differential current. The total value of fault current is usually obtained by means of diodes which route all the secondary currents through the bias circuit. The resultant bias is proportional to the arithmetic sum of all the circuit current, whereas the operating circuit is energized by the vector sum of all the
circuit currents as shown in figure 5. In a biased differential relay, the operating current is arranged to increase proportionally to the load (circulating) current.
Many of the considerations application to high impedance schemes are applicable here as well. For example independent check zone in addition to the main zone and supervision element are provided in this scheme.
1.6.3.4.: Low impedance relays in A.P. System :-i) ABB make RADSS relay
:-This is a percentage biased restraint bus differential relay. It come with factory setting.
This relay has only main zone. A separate check zone relay is not provided. A simple O/C starting relay SR is included as standard check feature in RADSS. This O/C relay is of the same high speed as that of main differential relay and has a fixed setting normally arranged to coincide with the largest line CT primary current rating.
An alarm (Supervising element) is included in the differential circuit to sense CT opening and disconnect the trip circuit after a present time delay of 5 Sec.
Relay’s performance is unaffected by use of auxillary CTs.
ii) GEC make MBCZ relay
:-This is a percentage biased differential relay having main and check zones. Separate module is used each circuit breaker an also one for each zone of protection. In addition to these, there is a common alarm module (which supervises the CT secondary circuits), test unit and number of power supply units.
It has an O/C element in differential circuit to sense opening of CT secondary circuits. On CT open condition, it gives an alarm. This is time delayed of 3 Sec. So that the operation of alarm does not occur during faults either internal or external to the protected zone.
1.6.4: Some concluding Remarks
:-In must be clearly understood that the high impedance as well as low impedance schemes have their own advantages. Both are well-tried, proven methods of providing protection for the busbar.
The most obvious advantage of a high impedance scheme is the fact that it combines sensitivity to internal faults and stability during throughfaults. The scheme may be made stable to any throughfault level, and yet retain sufficient sensitivity for internal faults with week infeeds. As it requires only very nominal current for operation, it can deal with internal faults that result in saturation of the CT. The scheme is simple and straightforward to apply.
A true low impedance scheme has the advantage that it can work with CTs of moderate output compared to a high impedance scheme. The scheme does not impose a high burden on the CT. Also, the scheme can work with CTs of u unequal ratio, which is of use in some situations.
In most substations, two Class PS cores per feeder are allocated for busbar protection – one for the main zone and the other for the check zone. Whenever two cores are available, a protection scheme that utilized both the cores must be employed for busbar protection.
Otherwise, one is compromising the security of the protection, as well as underutilizing available resources. A scheme that uses only one core has an inherent disadvantage - its setting must be such that no mal-operation occurs when there is an open circuitry of the CT secondary or the secondary leads.
Under this condition, the concerned zone will see an unbalance current equal to the load current flowing in the relevant feeder. To avoid unnecessary operation of the scheme, the zone settings or the setting of the check relay must be more than the maximum expected load current on any feeder in the substation. Thus, in the case of schemes that utilize only one CT core, the basic sensitivity is poorer than the load current.
When the scheme involves two CT cores, one feeding the main zone and the other feeding the check zone, the above problem does not arise. Open circuiting will affect only on the zones, and the tripping will not be through since the other zone remains stable. The chances of open circuitry occurring in two CT cores simultaneously is very remote. Hence is such a scheme, setting much lower then load current is possible.
In the same connection, it must be pointed out that schemes have check zone fed off independent CT cores are clearly superior to schemes that do not have check zones or those that cannot accommodate separate inputs for the main and check zones. First and foremost, a check zone contributes significantly to the security scheme.