Vinificaciones y seguimiento de las fermentaciones

The voltage regulation of a power inverter is a fundamental design factor in the control of the power inverter. One of the common challenges is to maintain high power quality when loaded with non-linear loads. Many approaches have been proposed in the literature to regulate the output voltage quality and improve its quality. The main approaches are reviewed in the follows.

2.7.1 Proportional-resonant control

In the case of power inverters, the controller has to both track and reject sinusoidal signals. Straightforward use of PI controller is not possible as this will lead to both steady-state tracking

𝑉𝑉

𝑍𝑍

𝐼𝐼

𝐼𝐼

_𝐼𝐼

Inverter

Load

𝑉𝑉

error and limited disturbance rejection. This is due to a finite gain in the fundamental frequency (Yuan et al., 2002; Blaabjerg and Chen, 2006). A schematic diagram of PR controller is shown in Fig. 2.16 where 𝑦𝑦∗_{(𝑡𝑡) is the output reference, 𝑦𝑦(𝑡𝑡) is the output signal, 𝑒𝑒(𝑡𝑡) is the error} signal and 𝑟𝑟(𝑡𝑡) is the controller output. The PR controller for single frequency is derived from the generalized integrator theory as follows.

Consider the error signal

si ( ) n( )

e t = A ωt (2.41)

where 𝜔𝜔 is the frequency of the sinusoidal signal to track, similarly to integral controllers for direct signal, the desired output of the controller is the amplitude integration of the error input (Yuan et al., 2002) e.g.

s ( ) t in( )

r t =A⋅ ωt (2.42)

The Laplace transforms of (2.41) and (2.42) are,

2 2 ( ) E s A s ω ω + = (2.43) 2 2 2 ( ) ( ) s R s A s ω ω + = . (2.44)

The desired resonant compensator𝐶𝐶𝑅𝑅(𝑠𝑠) is derived by dividing (2.44) by (2.43),

2 2 ( ) ( ) ( ) R R s s C s E s s ω = = + . (2.45)

The PR compensator is a combination of proportional gain and a generalized integrator its term is given by 2 2 ( ) PR s P r C K K s s ω = + + (2.46)

where 𝐾𝐾𝑃𝑃 is the proportional gain and 𝐾𝐾𝑟𝑟 is the generalized integrator gain. These design parameters should be chosen with accordance to the stability limits and the desired tracking and disturbance rejection performance (Kuperman, 2015). In the case where the disturbance

Fig 2.16 Schematic diagram of proportional resonant compensator

or the signal to track is expected to contain harmonics (2.46) becomes a multi-resonant compensator of the form

2 2 1 ) ( ) ( N PR P rh h s K K s h C s _ω = = + +

∑

where ℎ is the harmonic order and 𝑁𝑁is the number of parallel resonant compensators (Timbus, Teodorescu, et al., 2006). In the literature, these type of controllers are implemented in a single degree of freedom which leads to coupling between disturbance rejection and tracking performance in a similar way to the coupling shown in section 2.5.2 In this thesis a two degrees of freedom multi-resonant type controller is proposed in chapter 4. It is worth to note that this type of controllers are sensitive to frequency deviations. Adaptive mechanism are reported in the literature (Timbus, Ciobotaru, et al., 2006). However those are changing the compensator parameters in accordance with the frequency variations. A two degrees of freedom frequency robust multi-resonant controller is proposed in chapter 5 of this thesis.

2.7.2 Repetitive control

The repetitive controller is based on the internal model principle (Bin Zhang et al., 2008; Hornik and Zhong, 2010b). The fundamental idea is that the compensator is made of a positive feedback inner loop consists of a low-pass filter cascaded with a single period delay. In this way, the compensator gain is close to infinite at the multiples of the delay frequency within the bandwidth of the low-pass filter. From Fig 2.17 The transfer function of the repetitive compensator is 1 ( ) 1 ( ) d RP s C s W s e−τ = − . (2.48)

where 𝑊𝑊(𝑠𝑠) is a low pass filter designed to limit the compensator bandwidth and to increase the system stability. Following (2.48) the poles of the compensator 𝐶𝐶𝑅𝑅𝑃𝑃(𝑠𝑠) are the solution of

)

( e j d

W j_{ω =} −ωτ _{. (2.49)}

In (Zhong and Hornik, 2013) it is shown that when 𝑊𝑊(𝑠𝑠) is chosen as first order low-pass filter, the compensator poles can be approximated using the Lambert function presented in (Corless

et al., 1996) and that the delay time is chosen by the pole approximation. In chapter 6 of this

thesis it is shown that in the general case of choosing 𝑊𝑊(𝑠𝑠) as an n-th order low pass filter, the time delay can be chosen so that the sum of the filter delay and the repetitive delay will add up to a single period delay at the fundamental frequency for the rejection of all the harmonics up to the bandwidth of the filter 𝑊𝑊(𝑠𝑠) or to half a period delay for the rejection of odd harmonics (Costa-Castello, Grino and Fossas, 2004; Zhou et al., 2006).

This type of controller shows good results when the frequency is constant. However, they are highly sensitive to frequency variations. Methods to improve the robustness of this type of control includes adaptive mechanism which updates the internal filter with accordance to variations in the fundamental frequency (Hornik and Zhong, 2010a) and using high order repetitive control (Ramos, Costa-castello and Josep, 2015). However, the update of the internal filter requires the measurement or computations of the frequency and the proposed high order repetitive controllers be of a single degree of freedom structure which leads to a coupling between tracking performance to disturbance rejection performance. A two degrees of freedom multiple delay repetitive type controller is proposed in chapter 7 of the thesis.

2.7.3 Other control methods

Hysteresis control is one of the simplest non-linear controllers, it is mainly used to regulate the inverter inductor current (Kang and Liaw, 2001; Krismadinata, Rahim and Selvaraj, 2007). The main idea behind it is to create a hysteresis band for the inductor current which switches the voltage between −𝑉𝑉𝐷𝐷𝐷𝐷 to 𝑉𝑉𝐷𝐷𝐷𝐷 in order to keep the current within the hysteresis band by using a simple control law. The hysteresis band is divided to an upper band and a lower band when the current crosses the upper band then the inverter bridge is switched to – 𝑉𝑉𝐷𝐷𝐷𝐷 and when the current crosses the lower band then the inverter bridge is switched to 𝑉𝑉𝐷𝐷𝐷𝐷. The upper band is usually the reference current plus a margin value and the lower band is the reference current minus a margin value.

Sliding mode control is one the most common non-linear controllers applied in power inverters (Tai and Chen, 2002; Kukrer, Komurcugil and Doganalp, 2009; Komurcugil et al., 2016). The main idea behind it is to define a sliding surface within the state phase plane and switch between the inverter bridge discrete states accordingly. Among its strongest points are simple implementation and robustness to both disturbances and parameter variations. However,

+

+

𝑒𝑒

𝑒𝑒−𝜏𝜏𝑑𝑑𝑠𝑠 𝑊𝑊(𝑠𝑠)

varying switching frequency, chattering around the sliding surface are among its drawbacks and might prevent it from being used for inverter control in industrial applications.

A Lyapunov based approach has been proposed by (Komurcugil et al., 2015) has shown good results, yielding low THDs which suggests that the method output impedance is low. However, the approach is directly measuring the inverter load current, and hence a feedforward approach may achieve similar results.

A deadbeat control for single phase power inverters is proposed in (Kawamura, Chuarayapratip and Haneyoshi, 1988; Mohamed and El-Saadany, 2008; Zeng and Chang, 2008) This control method guarantees the convergences of the closed-loop system within a finite time. However, the method heavily depends on the knowledge of the inverter parameters and sensitive to system parameter uncertainties (Timbus et al., 2009).

A model predictive control which includes an estimation of the output current has been proposed for three-phase inverter in (Cortes et al., 2009). This controller optimizes the next switching sequence to minimize the tracking error. However, the assumption that the load current has no dynamics can lead to a good result only at a very high PWM and sampling frequency, and the controller has to solve an optimization problem at each switching cycle which may suggest a need for an high-performance microcontroller.