Y AHORA AL ABORDAJE PROPIAMENTE DICHO CUANDO ES POSIBLE

The array mod u l e backplane i n the VA.'( 8800 and 8700 CPUs is a 1 2-layer , 8-slot pressed-pin backplane. The one in the VAX 8 5 5 0 and 8500 CPUs is a 5 -s lot backplane. S ince a TTL bus was chosen to com m u n i cate between the memory controller and the array modu les, a good termi­ nation strategy had tO be deve loped . Us ing the SPICE s i m u l a tor, we evo l ved the term i nation strategies shown in Figure 5 .

I

CONTROLLER _I ARRAY MODULES

I

8480

I ECL TO TIL I _I Dl DO cs HLD -OHMS

F374

DO Dl CLK EN

NAB COMMAND/ADDRESS-WRITE DATA BUS

F374

F374

DO DO Dl Dl CLK CLK EN EN

..

F374

DO I I I I (TO

8

MODULES) I I I I I I I I I I I I I I I I I

8481

TIL TO ECL Dl cs HLD

F374

DO +5 VOLT Dl CLK EN

F374

F374

DO DO D l D l CLK CLK EN EN

NAB READ DATA BUS

Dl - DATA I N HLD - HOLD (CLOCK)

DO- DATA OUT EN - ENABLE

. .

L - - - -

-

-_ _ _ _ _ _ _ _ _ _ _j CS - CHIP SELECT CLK - CLOCK

Figure 5 Termination Strategies in Memory Controller and A rray Modules

F374

DO

Dl CLK

EN

Digital Technical journal _{5 9}

No. 4 February 1 987

The Memory System in the VAX 8800 Fam ily

Figure 6 Sixteen Megabyte A rray Module

Four Megabyte A rray Module

Summary

The 4 MB array module was designed using an 8-layer, control led-i mpedance, p r i n ted c ircui t board . The lay- u p consists of 4 rou t i ng layers , 2 power layers, and 2 ground layers . To support battery backup, the mod u le has separate power planes for + 5 V power and the + 5 V battery . S i nce o n l y a l i m i ted a m o u n t of - 5 . 2 V a n d - 2 V power i s needed , t hese v o l rages s h a re space on the other power planes. To eli m i nate d i sc o n t i n u i t i es t h a t c o u l d c a u s e u nw a n te d refl ections, we ensured that signals d i d not cross t h e power-p l a n e s p l i ts by s u rro u n d i ng t h e power planes with sol i d ground planes .

Approximately half of the logic technology on the array module consists MOS dynamic RAMS; the other half is FAST MSI logic. The clock system is i mplemented in ECL to m i n i mi ze the skew.

Sixteen Megabyte A rray Module

A 1 6MB array module was developed tO i ncrease the ava i l a b l e memory to 1 2 8 M B for the 8800 and 8700 systems and 8 0 M B for the 8 5 5 0 and 8 5 00 systems. This array mod u le consists of an 8-layer mother board (si m i la r to the 4 MB mod­ ule) and ei ght 2 MB surface-mounted daughter boards. The 1 6MB array modu le is pictured i n Figure 6 .

6 0

The VAX 8800 m emory system was designed to provide 7 1 MB per second of read bandwidth and 5 9 MB per second of write bandwidth to the m u l t iprocessor system . The system architecture, processor perfo r m a n c e need s , a n d h i g h I/0 activity com b ined to make a high-performance memory a requirement.

Since the 8800 contai ns ECL components, the memory system has to provide a high-speed path between the ECL logic i n the CPUs and the high­ d e ns i t y dyn a m i c RAMs u sed for m a i n storage . Although t h e m e mo ry system does n o t play a d i rect rol e i n the execut i on of a VAX i nstruc­ tion, i ts performance has ro match closely that of the m u l ti processor system . I f the memory sys­ tem were u nder designed , the processors would sta l l frequently, thus reducing their usable per­ fo r m a n c e . I f t h e m e m ory system were over designed , i t wou ld contai n extra com p l e x i ty , w i t h t h e attendant extra cost, that could n o t be used by the system . Thus the m emory strategy played an i m porta n t role in the pri ce/perfor­ mance trade-offs that had to be made .

Acknowledgments

Although done by a smal l group of engi neers, the design of the m e m o ry system was greatly

Digital Technical Journal

i n fl uen ced hy the efforts of many people from the E lectron ic Storage Devel opment G roup and t h e A d v a n c e d VAX E n g i n e e r i n g G r o u p . We

wou l d especia l l y l ike ro acknowl edge the cre­ ativity, leaders h i p , and energy level of the late .John Henry . Jr.

References

I . ] . Fu. J . Ke l l e r, and K . Haduch, "Ao;; pects of the VAX 8800 C J3ox Des ign , " Digital Techn ical journal (Febru a ry 1 987, t h i s issue: 4 1 - 5 1 .

2 . SPICE ·was devel oped by Lawrence Nagel a n d E l l i s C o h e n of t h e D e p a r t m e n t o f El ectrical Engi neeri ng and Co mputer Sc i­ ence, U n i versity o f Ca l i fornia, Berke ley.

Digital Technical journal No. 4 Febmmy I 'J87

New Products

John H.P. Zurawski Kathleen L. Pratt Tracey L. Jones

In document Atencion Aqui y Ahora Terapia Gestalt Julia Z de Baranchuk (página 79-82)