POSIBILIDAD DE CONTRATAR LOS SERVICIOS DE LA CONSULTORA

This is a more correct representation for common DC drain supply voltages, from a few to tens of volts. As drain voltage VDS is increased, the gate depletion region expands toward the drain. This increases the length of the narrow channel, increasing its resistance modestly. Larger resistance changes are due to changing gate bias.

Compare the two schematics in the preceding illustrations of N-Channel JFET and P-Channel JFET respectively and take particular note of the direction of the gate arrow in the schematics to the right of the illustrations; you will observe that the arrows point in the same direction as a junction diode. The directed arrow and non directed bar correspond to P and N-type semiconductors, respectively.

3.4 JFET AS AN AMPLIFIER

The most frequently encountered configuration in JFET amplifier design is the common source circuit where the source is common to the input as well as to the output. This is illustrated below.

N Channel JFET Common Source Amplifier

41 The source current flows through the resistor Rs to establish a voltage determined by the product of the two across the resistor. Noting that the gate is reversed biased with respect to the ground, it follows that effectively no current flows through the resistor Rg which infers that the voltage drop across it is zero; placing the gate effectively at ground potential. Drain current which flows through the resistor Ro creates a voltage drop across it being the product of the drain current and the output resistor Ro The difference between this voltage drop and the supply voltage represents the DC operating point of the drain.

The foregoing establishes the biasing of the transistor and the DC operating point. When a signal voltage is applied to the input through the capacitor, the signal sees Rg in parallel with the extremely high gate resistance of the JFET as the input impedance; this is essentially the same value as Rg which should be selected to be very high.

The voltage fluctuations at the input modulate the JFET’s channel resistance which appears at the output as the lower arm of a voltage divider; the channel resistance being in series with the output resistance RO the a rein turn are

4.0 CONCLUSION

In this unit we have learnt that Junction Field Effect transistors are device that operate with the input diode junction reversed biased which presents very high input impedance and derives its control from depletion of charge carriers from the channel.

5.0 SUMMARY

- Junction Field Effect Transistors derive control from depletion of charge carriers from the channel

- Very high input resistance is associated with the Junction Field Effect Transistor

- Junction Field Effect Transistor have a reversed biased gate junction diode - Very clean manufacturing environment is necessary for Junction Field

Effect Transistors

42

- Doping has a significant influence on channel depletion in Junction Field Effect Transistors

- Junction Field Effect Transistor are immune to damage through electrostatic discharge

- Modulating the Junction Field Effect Transistor’s gate voltage modulates the current flow through the device

- Junction Field Effect Transistor is used as a switch or as an amplifier

6.0 TUTOR MARKED ASSIGNMENTS

1 Can you provide one good reason why bipolar junction transistors preceded field effect transistors?

2 The major drawback of the bipolar junction transistor is its very low input impedance when compared with the field effect transistor.

Explain this as you would to a novice?

3 Describe in detail the operation of the junction field effect transistor?

4 Sketch the section of a junction P-channel field effect transistor and label its regions and parts?

5 Describe the control process for the junction field effect transistor stating why essentially all junction field effect transistors are depletion mode devices?

6 Why do junction field effect transistors not have a fourth terminal?

7 Sketch a JFET characteristic curve and label it?

8 The gate voltage at which the source current reaches zero is called the pinch voltage. Graphically illustrate this with a sketch and explain the process of pinch off in terms of channel resistance?

9 Using an N-channel JFET symbol and two voltage sources, draw a circuit illustrating how this JFET is biased”

10 Draw a sketch similar to that of question 9 above, but replacing one of the voltage sources with a bias resistor?

43 11 Sketch an N-channel common source JFET amplifier? Describe it

operation?

12 Why are junction field effect transistors difficult to manufacture?

13 Are junction field effect transistors damaged by electrostatic discharge? Explain why?

14 List five advantages junction field effect transistors have over bipolar junction transistors? Can you list two that they have over MOSFETs?

7.0 REFERENCES/FURTHER READINGS A Textbook of Electrical Technology 2010

By B. L. Theraja and A. K. Theraja. Published By S. C. Chand, Semiconductor Device Fundamentals

By Robert F. Pierret Published By Prentice Hill Electronic Devices and Circuit Theory 7^th Edition

By Robert E. Boylestad and Louis Nashesky Published by Prentice Hall

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