3. RESULTADOS Y DISCUSIÓN
3.1. GENERALIDADES
3.1.5. Proyecto con ecoeficiencia
The derivatives o f a real MESFET (Fig 6.2b) do not correspond with any o f the ideal cases outlined above. However, they do possess strong similarities by virtue o f the fact that the MESFET must pinch o ff in a non-abrupt manner, g ] exhibits both a positive and negative peak, but the later is much smaller than the former and has a pronounced tad. g2 also exhibits a strong peak and shows a prolonged tail. g i exhibits a continually rising curve with decreasing gradient. Measured curves o f the form o f Fig 6.2b have been published by Maas and Pedro in [1,2].
In filter and waveform synthesis, w e synthesise complex responses and waveforms by offsetting, inverting and scaling the basic shape. This is possible because the starting wave form or transfer characteristic has some sort o f pronounced maximum, whether singular, multiple or periodic. W e note the gg curve o f Fig 6.2b has such a maximum. We now
show how derivative shaping can be achieved for device transfer characteristics by combining and scaling FETs.
W e begin by targeting g]. By superposition o f gg with respect to v, w e can generate the gg profile required in the ideal realistic designs
S X n e w ) = I W;g(v - *,■ - (6.2.1)
/=!
where ki is an offset and wj is a scale factor. Both k and w can be either positive or negative real numbers. N is the number o f superposed curves. The form o f gg implies the shape o f g2 andgi through integration
N I f = 1 «2 “ Jo I v - k i ~ V g ff] d v (6.2.2) N i= 1 N g l = J J J J i W i s [ v - k j - v „ f f ) d v d v /=!
By exchanging the order o f integration and summation in Eqn 6.2.2 w e obtain a form that is realisable in the circuit domain
S3 = l ' V i g ( v - ki - Voff) / = ! N S2 “ I w/j%s( v - k j - Vg f f ) d v (6.2.3) /=! N I d v f =1
To realise the synthesis, we require a generalised topology o f the form shown in Fig 6.3, where each o f the N FETs has a width wi with an offset voltage v^i with a common bias voltage vbias- The currents are then summed with a weight o f +1, -1 or 0. (Alternatively the FETs can all be unity width and the current summed and scaled by factors o f +Wi, -wi or 0). Width optimisation is ideal for MMIC design, current scaling is useful when using
^out ^bias
V;in
w.
F ig 6.3. T o p o lo g y fo r d eriv a tiv e su p e rp o sitio n .
discrete devices. Negative weights can be obtained using baluns and slotline to CPW transitions etc.
The synthesis is capable o f realising any function that has a continuous derivative structure, providing the rate o f change is not faster than the parent function. W e now show how the synthesis can be used to linearise an amplifier, generate a square law composite FET for high conversion gain and low 3rd and 4th intermodulation distortion, realise a limiter and frequency doubling and tripling.
6 . 3 L in ear L aw
For a linear law circuit, not only must the value o f gg tend to zero, but the area under the positive and negative peaks must be approximately equal to minimise the g2- W e illustrate how the derivatives o f Fig 6.2b can be linearised through derivative superposition in Fig 6.4 using 7 additional smaller devices. Under this scheme there is a reduction o f gain associated with linearisation. It is possible to trade o ff gain reduction with the dynamic range o f the distortion reduction (i.e. the range o f Vgs values distortion reduction occurs). This is illustrated in Chapter 7 section 7.2.
An alternative strategy is to minimise only the 3rd order distortion (which is generally much more important the 2nd order distortion). Such a scheme would give gain enhancement and has been demonstrated by the author subsequent to the writing o f this thesis. The 2nd
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0.001 0.0008 0.0006 0.0004 0.0002 -0.0002 -0.0004 -0.0006 Orig; inal Curve -0.0008 -0.001 -3.00 -2.60 -2.20 -1.80 -1.40 -1.00 -0.60 -0.20 0.20 V g s V 0.0015 Orig inal Curve 0.001 0.0005 1.20 -3.C0 -2.60 -2.20 -1.80 -0.0005 -0.001 0.014 Orig inal ■Curve 0.012 0.01 0.008 0.006 0.004 0.002 -0.60 -0.20 0.20 -2.60 -2.20 -1.80 -1.40 -1.0 VFig 6.4 L in ear L aw A p p ro x im a tio n u sin g D eriv a tiv e S u p e r p o sitio n . R F d eriv a tiv es are p lo tted a gain st DC V gs V oltage.
T he
order distortion could then be minimised through balancing. The form o f the derivatives would be similar to the following case for the ideal multiplier.
g3 m S/V /V 5 -3.00 -2.60 -2.20 -1.80 -1.40 -1.00 -0.60 -0.20 0.20 gs g2 m S/V 6 T 4 -- -3.00 -2.60 -2.20 -1.80 -1.40 -1.00 -0.60 -0.20 0.20 V g s V
F ig 6.5 Sum o f (a) R F gg and (b) R F g2 d eriv a tiv es vs DC b ias for a S q u a r e L aw ap p ro x im a tio n . In set sh ow s m a g n ifie d p o rtio n .
6 . 4 S q u a re L aw
W e present optimised derivative results (Fig 6.5) for a Square Law system using 10 FETs. This configuration is particularly attractive for active mixers since 2nd order output is increased with 3rd and 4th order output reduced with negligible change in DC efficiency. The non-zero slope for g2 in Fig 6.5b is thought to be due to the frequency dispersion associated with the bias dependant electrostatic feedback. This shows the need to develop the technique further to maximise the RF dynamic range for a given DC operating point. However, it is thought that the current technique o f optimising against DC bias provides an excellent starting point for such a subsequent optimisation. This case is unique that it only requires the summing o f currents leading to a self contained MMIC implementation.
^out
6 -r lo u t
4 .
V in V
b - 8 l
F ig 6.6. S P IC E S im u la tio n o f lim ite r circu it. (a) D ynam ic tra n sfer c h a r a c te r istic , (b) A p p ro x im a tely sin u so id a l ou tp u t u n der tria n g u la r e x c it a t io n .
6 . 5 L im iter (H y p er b o lic T an gen t)
A Limiter circuit using 6 FETs was hand optimised with the synthesis technique. In Fig 6.6, we show its hyperbolic tangent like transfer characteristic under a triangle wave excitation (Fig 6.6a) and the simulated performance o f the Limiter in the time domain emphasising its potential as high frequency triangle to sinewave converter.
This circuit offers the potential to realise high speed hyperbolic tangent and triangle to sine conversion functions that are immune to the frequency dependant distortion that would arise from D evice Circuit Interaction (Chapter 3) in other nonlinear function synthesis techniques such as the Translinear loop (Section 2.4.2.3). Its role as true limiter is limited as excessive positive voltage swings could cause the gate junction to become forward biased resulting in the destruction or damage o f the devices.
6 . 6 D o u b le r
Frequency doublers have traditionally used a matched balanced topology to realise the frequency doubler. We now show the simulated transfer characteristic o f a hand optimised frequency doubler using derivative superposition (Fig 6.7a). The simulated output under sinusoidal drive is shown in Fig 6.7b. The low level o f unwanted harmonics indicates a