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Sistemas de Información

3. SECCIÓN PRÁCTICA

3.5. Sistemas de Información

The work in this thesis involves a comparison between four diode-connected driver schemes in terms of their performance on long interconnect. Consequently, to make a fair comparison between the schemes, the same interconnect architecture is used. For each of the schemes under test, the following metrics will be considered.

a) Dynamic power consumption

The dynamic switching energy of a wire is a function of wire capacitance, load capacitance, supply voltage and voltage swing, which is shown in Equ.3.1 [5];

72 . (3.1) While the dynamic power consumption can be calculated by using Equ.3.2, which is a product of energy and switching frequency.

(3.2)

b) Design complexity

The design complexity of a signalling scheme can be measured in terms of its area overhead and the use of additional Vdd or low-Vth devices.

c) Delay

Delay can be approximated by the Sakurai‟s equation [6] shown below.

(3.3) where and are the interconnect resistance and capacitance per unit length, , is the output resistance of the driver, and is the load capacitance. The output resistance of a

MOSFET is a nonlinear function of the supply voltage. A closed form expression for is given below [7]. (3.4) where, (3.5) and (3.6)

Where, Idsat = saturation drive current, Vdsat = saturation source drain voltage, W/L =

transistor aspect ratio, tox = gate oxide thickness, λ = channel length modulation, proportional

to the increase of channel length.

CL can be calculated through the equation for the driver delay, which is approximately

73 package, for example, SPECTRE. The delay can also be obtained by measuring from the 50% Vdd point of the signal input of the driver to corresponding point on the signal at the end of the line, i.e. the signal input of the receiver, as shown in Figure 3.1.

d) Energy-Delay-Product and Power-Delay-Product

Both metrics can be used to analyse both power and speed performance. Energy-Delay- Product (EDP) is a product of total energy consumption and propagation delay while Power- Delay-Product is defined as a product of the average power consumption and propagation delay. These metrics are usually used in determining optimized widths of a device. EDP is preferable since it is independent of the operating frequency, which simplifies the optimization process and can be applied at any signal rate.

e) Waveform integrity

Waveform integrity can be measured in terms of slew rate and signal overshoot. An ideal signal is a step function, switching instantaneously between 0 and Vdd. However, this model is only an approximation to the actual switching waveforms, which in reality have a non-zero slew rate and possible signal overshoots.

Vdd Vout Vin Delay Overshoot Slew rate (V/t) Voltage Time Undershoot 90% 10%

74 Slew rate is defined as the ratio of voltage to time (V/t) required for the signal to change from 10% to 90% of its final value. Due to limited driver strength and lossy interconnect condition, switching in reality has a finite slew rate, which delays signal stabilization and transportation. As circuit speed increases rapidly, slew rates need to be well controlled. Furthermore, high speeds may also lead to signal overshoot, either above Vdd or below ground (undershoot), as shown in Figure 3.1.

f) Reliability

Reliability is measured in terms of signal-to-noise (SNR) ratio, which is defined as

(3.7)

The worst-case noise analysis for reliability measurement has been summarised in [9]. The overall noise is considered to be generated from two main sources categorized as either proportional noise sources or independent noise sources, as shown below,

(3.8) The proportional noise sources ( ) are proportional to the magnitude of signal swing such as crosstalk and the signal-induced power supply noise. The signal-induced power supply noise is estimated to be 1% and 5% of the signal swing for differential and single-ended signalling, respectively. The crosstalk coupling coefficient, KC is a ratio

between coupling capacitance and interconnect load capacitance as shown in Equ.3.9, where

CC is the coupling capacitance, CW is the interconnect capacitance and CL is the fan-out

capacitance. The crosstalk attenuation is estimated to be 0.05 for a static driver circuit. Therefore, when considering the effect of crosstalk noise, KN = AttnCKC + where AttnC is

crosstalk noise attenuation.

(3.9)

comprises independent noise sources such as receiver input offset, receiver sensitivity

and signal-unrelated power supply noise. The receiver input offset, RX_O and receiver

sensitivity, RX_S are dependent on the receiver, which involves changes in the receiver‟s

switching threshold voltage in respect to process variations. The signal-unrelated power supply noise, PS is assumed to be 5% of the magnitude of the power supply. The power

75 supply attenuation coefficient, Attn is defined as the change in the switching threshold voltage in respect to the supply voltage variation whilst the transmitter offset, TX_O results

from the parameter mismatch between the transmitter and receiver. Equ.3.8 can subsequently be expanded to include these noise parameters, as shown in Equ.3.10.

(3.10)

The power supply attenuation coefficient, Attn is measured by the changes in receiver switching threshold voltage due to the change of the supply voltage, as shown in Figure 3.2(a). Receiver input offset, RX_0 and receiver sensitivity, RX_S can be measured as shown

in Figure 3.2(b) where the worst case difference of the threshold voltage is measured at every simulated process corner.

OUT IN ΔVtho ΔVdd Rx_O Rx_S OUT IN (a) (b)

Figure 3.2: The measurement of (a) power supply attenuation coefficient, and (b) receiver input offset and sensitivity [9].

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