Análisis predictivo otv-818-oe03 (02-03-2015) Termografía inyectores

During the initial phase of a system design, the characteristics of the driving buffers may not be defined. Since the properties of the buffers are one aspect of a design with many

codependent variables, some assumptions must be made about the buffers in order to proceed with the design. Typically, a model with a linear I-V curve is chosen for early simulations rather then "guessing" at a more complex behavioral model such as a transistor curve. The linear I-V model is usually appropriate for this stage of design, for three reasons. First, it is far easier to do multivariable "sweeps" with linear models, due to the simplicity of the model (see Chapter 9). Second, the linear model leaves nothing to wonder about strange effects from a particular choice of buffer model. This can simplify matters greatly. Third, the linear model has been shown to be fairly accurate when used correctly, so more complex models are not motivated early in the design. Requirements for edge rate and driver strength for the system being defined are easily examined during simulation with linear models, and results may easily be tested. If buffers from an already existing driver are to be used, full models from these buffers should be used instead of linear models. Also, if it is known that a buffer will be used that does not have an approximately linear I-V curve in the region of interest, a linear buffer model is obviously not merited.

The linear model has two features. It has a I-V curve for a pull-up and a pull-down. (Ideally, in a CMOS design, the pull-up and pull-down devices will be very similar.) The model also has a curve defining its switch behavior versus time. The I-V curves are a straight-line (resistor) approximation to a transistor curve. How to pick a good linear fit to a transistor curve will be shown later.

The most simplistic linear model for a CMOS buffer is constructed of a switch, a pull-up resistor, and a pull-down resistor. The values of the resistors are chosen to approximate the impedance of the NMOS and PMOS devices in the intended region of operation. Pull-up and pull-down transitions are made with the switch. The major drawback of this model is that there is usually no edge rate control, because the switch is either in one position or the other, which is a step function. In this case, the edge rates of the model are usually governed by the time constant formed by the output capacitance and the parallel combination of the buffer resistance and the characteristic impedance of the transmission line. Figure 7.12a

shows this simplistic model. This model is generally only used for "back of the envelope" calculations.

Figure 7.12: (a) Most simplistic linear model of a CMOS buffer; (b) another simplistic

linear approach.

Another, rather simplistic linear model is shown in Figure 7.12b. This model assumes that the impedance of the pull-up and the pull-down are both equal to the impedance Zs. This

modeling approach has the advantage of voltage-time, edge-rate control. The voltage source,

Vs, can be specified in SPICE-like simulators to transition from 0 to Vdd in a specified amount

of time. Furthermore, most simulators allow the creation of a piecewise-linear voltage-time transition so that specific edge shapes can be mimicked.

A more complete linear model would assume separate linear I-V curves for the pull-up and pull-down devices and have separate curves that describe how the voltage sources will switch from low to high and from high to low. In this book, these curves are known as switch- time curves. An even more complete model would include two switch-time curves for the pull-up device and two switch-time curves for the pull-down device. This is because each device must be turned on and turned off. An example model for a pull-up and a pull-down device of a basic CMOS buffer is shown in Figure 7.13. The curves shown in Figure 7.13 are input into the simulator. Some simulators assume an edge shape and require the user to input only the impedance and the turn-on and turn-off times of the pull-up and the pull-down. Although various simulators may interpret these curves differently, they are often interpreted as explained below.

Figure 7.13: Behavioral linear model: (a) pull-down; (b) pull-up.

Generally, the switch-time curve defines how quickly the impedance, Rout, approaches the

value in the I-V curve when the device is turning on, as shown in Figure 7.14. Basically, the switch-time curve defines how quickly the switch turns on to its full value. When the model is interpreted in this fashion, it will be referred to here as a linear—behavioral model. As shown in Figure 7.15, the varying impedance of the device causes the instantaneous operating point

Figure 7.15: Interpretation of a linear—behavioral model.

to "climb" up the load curve. This is similar to the behavior of a transistor as Vgs increases

and the device is transitioning to successively larger, lower impedance Vgs curves as the

gate voltage increases.

It should be mentioned that some simulators might interpret the I-V and switch-time curves as the model shown in Figure 7.16. In the figure, the switch-time curve is interpreted as a voltage-time curve and is included in the model as a voltage source. The impedance of the model is fixed as the impedance of the I-V curve input into the model. When the model is interpreted in this fashion, it will be referred to here as the linear—linear model. The linear— linear model is likely to be the model used internal to the simulator if the simulation is run in the frequency domain rather than in time domain. To compare this with the variable

impedance linear behavioral model, compare Figures 7.15 and 7.17. It can be seen that the location of the points labeled t0 through t4 will be slightly different depending on whether the

model is interpreted as a linear—linear model or a linear—behavioral model. Also, the linear—linear model can give different results than the linear—behavioral model when considering termination issues. For instance, if Ro = Zo, a reflection terminating at the driver

will be matched according to the linear—linear model even when the driver is transitioning. For the linear—behavioral model, the impedance

Figure 7.16: Basic functionality of linear—linear model: (a) circuit; (b) switch-time curve;

(c) pull-down curve.

during the switching interval is dynamic, and thus a reflection arriving during a transition may not be perfectly terminated.

Figure 7.17: Interpretation of a linear—linear model.

The straight line used to approximate a transistor curve for linear models should be constructed as shown in Figure 7.18. The line is defined by two points, one point the zero

current point and the other the point where the transistor curve is expected to cross Vdd/2,

which is generally the threshold voltage at which receivers define the time location of the edge. Also, as shown, lines should be constructed for the nominal, minimum, and maximum expected curve characteristics to account for variation with temperature, silicon process, and so on. Often, prior to the design of the buffer, the system engineer will perform many

simulations with linear buffers that will place limitations on the amount of variation, as we elaborate in Chapter 9.

Figure 7.18: Measuring the impedance of an I-V curve.