An overview of the R&D deliverables needed to produce theTDRs in 2016 (ITk-Strips) and 2017 (ITk-Pixels) is given below.
For the Pixel detector the R&D deliverables are:
1. The development of sensor technologies including: thin standard planar (n-in-p) and 3D sen- sors with adequate radiation tolerance, minimum dead areas and minimised power dissipation at the radius of the innermost layers at the end-of-life. A qualified prototype is expected by end 2016 or beginning 2017.
2. The design of a front-end chip that is capable of reading out the pixel detector at the required trigger rates, tolerant of the extreme flux of radiation at smallest radius with low power and with high bandwidth.
ATLAS
ITk-pixel institutes are working within the RD53 collaboration [13] todevelop front-end architectures for both
ATLAS
andCMS
. This will be realised in a 65 nm technology. For the readout chip a main R&D deliverable will be the fabrication of a large for- mat prototype, called RD53A, to be submitted towards the end of 2016. This will be produced on full 12" wafers, suitable to exercise the bump-bonding assembly chain. The chip prototype cost is shared between theATLAS
andCMS
collaborations.3. A significant fraction of the cost, complexity and risk is the bump-bonding. As part of the preparation for theTDR, theITkcollaboration will work to qualify at least three bump-bonding vendors with an aggregate capability of 100-200 modules/week, which is required to complete the detector within the required schedule. For the qualification of bump-bonding vendors, the deliverable will be a quad-module trial production in 2016. Approximately 100 quad modules per vendor will be fabricated with the older FE-I4 chips available from the production of theIBL to minimise the overall cost.
4. While the on-detector front-end electronics generates digital electrical signals the data is trans- mitted off-detector optically. The transition from electrical to optical is not done on the detector module but as close as possible. The bandwidth requirements, required radiation tolerance of the transmitter, the location of the transmitters, the distance between the front-end chips and the transmission of the data between the front-end chips and the optical transmitters using the minimum amount of material in the active volume is a critical design issue that needs consid- erable development if it is not to adversely affect detector operation or tracking performance. For the data transmission from the front-end chips the deliverable will be the cable-qualification and full-scale prototype of candidate technologies by the end of 2016.
5. For the power distribution, qualified at system level, the deliverable will be a full-scale power distribution prototype for a stave. Initial prototypes will necessarily be based on FE-I4 chip modules.
6. One particularly promising and active area of research within the pixel community is that of CMOS sensors. This technology offers the possibility of low-cost, low-voltage commercial sensors with some of the front-end electronics embedded in the sensor itself. Before this technology could be used for HL-LHCit will be necessary to demonstrate both the radiation tolerance, required at the pixel detector radius, and a significant cost advantage with respect to more established technologies. For the development ofCMOSsmart sensors the deliverable will be a full-scale radiation-tolerant demonstrator module by the end of 2016.
For the Strip detector the R&D deliverables are:
1. The finalisation of the design and ongoing characterisation of planar n-in-p sensors for the barrel and end-cap modules. The purchase of sensors for the development of tooling used for module development and pre-production will continue up to the time of theTDRin late 2016. 2. The development of a radiation tolerant 256 channel front-end readout chip, called ABC-star,
for the strip modules that will enable the entire strip tracker to be read out at either 1 MHzL0 trigger rate or at 400 kHz while respecting the new L0/L1 trigger architecture. This develop- ment relies on the years of experience gained in the current
ATLAS
Semi-Conductor Tracker and will be realised using the 130 nm process.3. The development of theHCCthat aggregates the data from the individual front-end chips and prepares them for transmission off-detector by optical transmitter. This chip will be realised in the radiation-tolerant 130 nm process. Limited production runs will be done of both front-end
andHCCchips to allow for the pre-production construction of modules, staves and petals. The first submission of pre-production chips will be in Q1 2016 and radiation tolerance andSingle Event Upset (SEU)testing will continue up to and beyond the submission of theTDR.
4. How to supply the LVand HVto the front-end electronics is an active area of development. Developments in DC-DCconverters are currently being assessed for theLV supply and HV switching for the detector bias. Demonstration of the viability ofHVandLVpowering schemes, specification of power supplies and understanding of the possible re-use of existing cables should be underway by Q4 2015.
5. The design of the hybrids for both the barrel staves and end-cap petals needs to be finalised for the new architecture that will enable the entire strip detector to be read out at 1 MHz. Hybrid designs and layout need to be complete and reviewed by Q1 2016. Final stave and petal power-boards and bus-tape designs will need to be completed and reviewed in 2016. 6. TheITkstrip community is also actively engaged in studies ofCMOSsensors. Because the
strip detector has such a large area the cost saving and performance enhancements could be considerable.