C H A P T E R O B J E C T I V E S
Upon successful completion of this chapter you will be able to:
• Describe some advantages of programmable logic over fixed-function logic.
• Name some types of programmable logic devices (PLDs).
• Use Altera’s MAX⫹PLUS II PLD Design Software to enter simple combi- national circuits using schematic capture.
• Use VHDL entity declarations, architecture bodies, and concurrent signal assignments to enter simple combinational circuits.
• Create circuit symbols from schematic or VHDL designs and use them in hierarchical designs for PLDs.
• Assign device and pin numbers to schematic or VHDL designs and compile them for programming Altera MAX7000S or FLEX10K20 devices.
• Program Altera PLDs via a JTAG interface and a ByteBlaster Parallel Port Download Cable.
I
n the first three chapters of this book, we examined logic gates and Boolean algebra. These basic foundations of combinational circuitry, as well as the sequential logic cir- cuits we will study in a later chapter, form the fundamental building blocks of many digi- tal integrated circuits (ICs).In the past, such digital ICs were fixed in their logic functions; it was not possible to change designs without changing the chips in a circuit. Programmable logic offers the dig- ital circuit designer the possibility of changing design function even after it has been built. A programmable logic device (PLD) can be programmed, erased, and reprogrammed many times, allowing easier prototyping and design modification. (The industry marketing buzz often refers to “rapid prototyping” and “reduced time to market.”) The number of IC packages required to implement a design with one or more PLDs is often reduced, com- pared to a design fabricated using standard fixed-function ICs.
PLDs can be programmed from a personal computer (PC) or workstation running special software. This software is often associated with a set of programs that allow us to design circuits for various PLDs. MAX⫹PLUS II, owned by Altera Corporation, is such a software package. MAX⫹PLUS II allows us to enter PLD designs, either as schemat- ics or in several hardware description languages (specialized computer languages for modeling and synthesizing digital hardware). A design can contain components that are in themselves complete digital circuits. MAX⫹PLUS II converts the design information
into a binary form that can be transferred into a PLD via a special interface connected to the parallel port of a PC. ■
4.1
What Is a PLD?
Programmable logic device (PLD) A digital integrated circuit that can be pro- grammed by the user to implement any digital logic function.
Complex PLD (CPLD) A digital device consisting of several programmable sec- tions with internal interconnections between the sections.
MAXPLUS II CPLD design and programming software owned by Altera Cor- poration.
Schematic capture A technique of entering CPLD design information by using a CAD (computer aided design) tool to draw a logic circuit as a schematic. The schematic can then be interpreted by design software to generate programming in- formation for the CPLD.
Compile The process used by CPLD design software to interpret design informa- tion (such as a drawing or text file) and create required programming information for a CPLD.
One of the most far-reaching developments in digital electronics has been the introduction of programmable logic devices (PLDs). Prior to the development of PLDs, digital cir- cuits were constructed in various scales of integrated circuit logic, such as small scale inte- gration (SSI) and medium scale integration (MSI) devices. These devices contained logic gates and other digital circuits. The functions were determined at the time of manufacture and could not be changed. This necessitated the manufacture of a large number of device types, requiring shelves full of data books just to describe them. Also, if a designer wanted a device with a particular function that was not in a manufacturer’s list of offerings, he or she was forced to make a circuit that used multiple devices, some of which might contain functions neither wanted nor needed, thus wasting circuit board space and design time.
Programmable logic provides a solution to these problems. A PLD is supplied to the user with no logic function programmed in at all. It is up to the designer to make the PLD perform in whatever way a design requires; only those functions required by the design need be programmed. Since several functions can usually be combined in the design and programmed onto a single chip, the package count and required board space can be re- duced as well. Also, if a design needs to be changed, a PLD can be reprogrammed with the new design information, often without removing it from the circuit.
PLD is a generic term. There is a wide variety of PLD types, including PAL (pro- grammable array logic), GAL (generic array logic), EPLD (erasable PLD), CPLD (com-
plex PLD), FPGA (field-programmable gate array), as well as several others. We will be
focussing on CPLDs as a representative type of PLD. Although terminology varies some- what throughout the industry, we will use the term CPLD to mean a device with several programmable sections that are connected internally. In effect, a CPLD is several intercon- nected PLDs on a single chip. This structure is not apparent to the user and doesn’t really concern us at this time, except as background information. We will look at the structure of PALs, GALs, and CPLDs in Chapter 8. We will use the term “PLD” when we are referring to a generic device and “CPLD” as a more specific type of PLD.
A complication in the use of programmable logic is that we must use specialized com- puter software to design and program our circuit. Initially, this might seem as though we are adding another level of work to the design, but when these computer techniques are mastered, it shortens the design process greatly and yields a level of flexibility not other- wise available.
4.1 • What Is a PLD? 117 Let’s look at two examples, comparing the use of SSI logic versus programmable logic.
❘❙❚ EXAMPLE 4.1 Figure 4.1 shows a majority vote circuit, as described in Problem 3.4 of Chapter 3. This cir- cuit will produce a HIGH output when two out of three inputs are HIGH. Write the Boolean equation for the circuit and state the minimum number and type of 74HC devices required to build the circuit. How many packages would be required to build two such circuits?
FIGURE 4.1
Majority Vote Circuit
Y A
B
C
FIGURE 4.2
74HC Devices Required to Build a Majority Vote Circuit
B A Y 74HC08A 74HC4075 Vcc Vcc C Solution Boolean equation: Y AB BC AC
Figure 4.2 shows the 74HC devices required to build the majority vote circuit: one 74HC08A quad 2-input AND gate and one 74HC4075 triple 3-input OR gate. Figure 4.2 also shows connections between the devices. Note that unused gate inputs are grounded and unused outputs are left open.
Two majority vote circuits would require 6 ANDs and two ORs. This requires one more 74HC08A package.
❘❙❚ EXAMPLE 4.2 Show how a CPLD can be programmed with a majority vote function, using a schematic
capture tool. State how many CPLDs would be required to build two majority vote
circuits.
Solution A CPLD can be programmed by entering the schematic directly, using PLD programming software, such as Altera Corporation’s MAXPLUS II. Figure 4.3 shows
FIGURE 4.3
MAXPLUS II Graphic Design File of a Majority Vote Circuit
A INPUT INPUT INPUT AND2 AND2 AND2 OR3 Y OUTPUT B C
The design can be compiled by MAXPLUS II to create the information required to program the CPLD with the majority vote circuit. If a second copy of the circuit is re- quired, the first circuit can easily be duplicated by a Copy and Paste procedure. The two circuits can than be compiled together and used to program a single CPLD.
❘❙❚
4.2
Programming PLDs using MAXPLUS II
Design entry The process of using software tools to describe the design require- ments of a PLD. Design entry can be done by entering a schematic or a text file that describes the required digital function.
Fitting Assigning internal PLD circuitry, as well as input and output pins, for a PLD design.
Simulation Verifying design function by specifying a set of inputs and observing the resultant outputs. Simulation is generally shown as a series of input and output waveforms.
Programming Transferring design information from the computer running PLD design software to the actual PLD chip.
Download Program a PLD from a computer running PLD design and program- ming software.
Software tools Specialized computer programs used to perform specific functions such as design entry, compiling, fitting, and so on. (Sometimes just called “tools.”)
Suite (of software tools) A related collection of tools for performing specific tasks. MAXPLUS II is a suite of tools for designing and programming digital functions in a PLD.
Target device The specific PLD for which a digital design is intended.
Altera UP-1 board A circuit board, part of Altera’s University Program Design Laboratory Package, containing two CPLDs and a number of input and output devices.
In order to take a digital design from the idea stage to the programmed silicon chip, we must go through a series of steps known as the PLD Design Cycle. These include design
entry, simulation, compiling, fitting, and programming. All steps require the use of PLD
software, such as Altera’s MAXPLUS II, a suite of software tools, to perform the vari- ous tasks of the design cycle. Some tasks, such as design entry, require a great deal of at- tention; others, such as fitting a design to a specified CPLD, are done automatically during the compiling process.
We will be using MAXPLUS II as a vehicle for learning the concepts that relate to PLD design and programming. The target devices for our designs will be two Altera CPLDs, both installed on a circuit board available from Altera called the University Pro-
4.2 • Programming PLDs Using MAX+PLUS II 119 gram Design Laboratory Package. We will generally refer to this board, shown in Figure 4.4, as the Altera UP-1 board.
FIGURE 4.4
Altera UP-1 Board
FIGURE 4.5
Altera MAX7000S and FLEX10K CPLDs
Figure 4.5 shows photos of the two CPLDs used in the Altera UP-1 Board. Figure 4.5a shows the CPLD from the MAX7000S family, part number EPM7128SLC84-7. Figure 4.5b shows the CPLD from Altera’s FLEX10K series, part number EPF10K20RC240-4. These part numbers are meaningful and will be discussed in detail in Chapter 8.
In the remaining part of this chapter, we will learn how to enter a design in MAXPLUS II in both graphical and text format, how to compile the design, and how to
download it into either one of the CPLDs on the Altera UP-1 circuit board.
Treat this design example as a tutorial in MAXPLUS II. Follow along with all the steps on your own computer to get the maximum benefit from the chapter. If you do not have access to the Altera UP-1 board or an equivalent, you can still follow through most of the steps.
Although the examples in this book are created with the Altera UP-1 board in mind, they will easily adapt to other circuit boards carrying an Altera EPM7128S or other similar CPLD. One such board is available from Intectra Inc. For further informa- tion, contact Intectra at:
Intectra, Inc 2629 Terminal Blvd
Mountain View, CA 94043 U.S.A. Ph 650-967-8818 Fx 650-967-8836 [email protected]
www.intectra.com (Web site in Spanish only)