ESTRUCTURA CONCEPTUAL DEL SABER

W h e n a p rogr a m w i t h m a n y f l o a t i n g p o i n t i nstructions - such a s U N PACK - i s r u n , i ts performance is not tota lly d icta ted by the raw floating point speed of the CPU . Having a more profound effect are other factors, such as • The size and orga n i zation of the cache - This

factor is particularly i m portant for programs w i t h l a rge a m o u n t s of d a t a b e c a u s e t h e o p e r a n d s w i l l res i d e i n m e m o ry . H a v i n g superior register-to-register performance will not help i n this type of program . Clearly, the larger the cache, the greater the chance that the req u i red data wi l l be q u i ck ly ava i lable, t h u s a v o i d i ng a l e n g t h y tra n s a c t i o n w i t h memory.

• The performance of the i n teger and control

i nstruct i o ns - Even program s performing extensive floa t i ng point operations sti l l have s i gn i fi c a n t a m ou nts of i nteger a n d control i nstru c t i o n s . Doing t hese q u ickly can con­ tribute substantially ro the program ' s perfor­ mance .

To il lustrate the effect of t hese factors, com­ pare the performance of the VAX 8800 system w i t h t h a t of t h e VAX 8 6 5 0 w h e n b o t h r u n UNPACK, a s shown i n Table 2 .� The 8 6 5 0 has faster raw floati ng poi n t speed , especial ly for the F format (over twice as fast) . Yet the two systems r u n t h i s be n c h m a r k w i t h a l most t h e s a m e performance . C learly, i n progra m s with t hese c h a racterist i c s , facrors other than raw

Digital TechnicalJournal

speed w i l l have a greater i n fl uence on perfor­ mance . Of course. in app l i cations without the m . the raw s p e e d advantage of the 8 6 5 0 w i l l b e more pronounced .

Table ₂ UNPACK Performance

Performance (M FLOPS) Computer VAX 8800 VAX 8650

Summary

The a r c h i t ec t u re of a p rocessor l i ke the VAX 8800 CPU is a l l a matter of trade-offs . Where does the performance make a d i fference 1 For

exa m p l e , we cou l d have s u p pl i ed t h e 8 8 0 0 w i t h a separate floating po i n t u n i t t O a c h i eve faster performance . Doing that, however, wou ld have req u i red a t l east one extra mod u l e . To keep the cost of the system constant. this extra mod u l e wou ld have entai led removing a module of logic from some other part of the comput e r . P e r h a ps r e m o v i n g t h a t m od u l e wo u ld have resu l ted in a sma l ler cache or a si mpler decoder with no opti m i zations for the frequent i nstruc­ t i o n s . In any c a se the net effec t wou l d have been w sacrifice the performance of the com­ puter in some other area . All thi ngs considered . we feel that the design is well balanced for the multitude of different computing tasks that CLts­ tomers w i l l perform with the VAX 8800 syste m .

Acknowledgments

The authors wou ld l i ke to thank Ron Me lanson and his team for the c i rcu i t design of the custom multipl ier. In add ition, we wou ld l i ke w thank Dave Sager for his help and gu idance.

References

1 . R. 13urley, "An Overview of the Four Sys­ tems i n the VAX 8 8 0 0 Fa m i l y , " D igital

Technical jo u rnal ( February 1 98 7 , this issue) : 1 0- 1 9 .

2 . T . Fossu m , W . Grundmann, and V . Blaha.

"The F Box, F l o a t i n g Po i n t i n the VAX 8 6 0 0 System , " Digital Techn ical jo u r­ nul (August 1 98 5 ) : 4 3 - 5 3 .

Digital Technical journal No. 4 Fe/Jruarp I <)87

.'1 . VA X A rchite c t u re Ma n u a l ( Ma y n a rd : D i g i t a l E q u i p m e n t Corpora t i on . Order No. EB- 1 9 5 8 0 , 1 98 1 ) .

4 . j . Donga rra , " Pe rfo r m a n ce of Va r i o u s Computers U s i n g Standard Li near Equa­ tions Software in a FORTRAN E n v i ro n ­ ment . " Argonne National Laboratory (May

l 9H6 ) .

5 . S . Mishra, "The VfuV. 8HOO ,\f icroarchitec­ tUIT , " Digital Technical jou rna! (Febru­ a ry 1 98 7 , this issue) : 20-3 3 .

7 1

james P. janetos

I

The

VAX 8800 Input/Output System

The VAXBI bus links the processors in the VAX 8800family to ljO devices, including clusters and networks. The VAX 8800 multiprocessor can sup­ port four of these 32-bit synchronous buses, each of which connects up to

16 /jO devices. Each VAXBI bus connects to the memory interconnect, the NMI bus, by an l\'Bl adapter, which contains an interface chip to imple­

ment the VAXBI protocol. The NB/ adapter logic handles CPU references and direct memory accesses to and from the ljO devices. The adapter has its own 200-nanosecond clock, which is completely asynchronous with

the 45-ns CPU clock.

T h t: VAX 8 8 0 0 fa m i l y o f systt: m s i s a n o t h e r

major stt:p for D i gi ta I E q u i pmenr Corporat i o n

i n t o t h t: rt:al m of h igh-performance computi ng. \Vh i l c: i n creas i n g the comp u t i n g capa b i l i ty of

tilL VAX l i ne for scientific and tec h n i cal app l i ­

cat ions. these systems wil l undoubtedly play a n i m portant ro le i n c o m m erc i a l a n d offi u: mar­

kets. I n thest: markets , the abi l i ty ro connt:cr ro a

com p u t i n g c l u s t e r . serv i c e m a n y users. a n d function i n a network arc a s i m portant a s a fast CPU. I ndt:ed , i n a m u lti user. m u l t i progra m m i ng system , the effi c iency of " housekeepi ng" opera­ tions affects the perceived system performance as m u c h as raw p rocessor c o m p u t i ng speed . T h e se o p e ra t i o n s i nc l u d t: s h a r i n g m e m o ry between m a n y program s , swapp i ng processes i n to and out of memory. raging, and respon d i n g to i nteractive user requests .

Al l members of the VAX 8800 fa m i ly usc Digi­ ta l ' s new VAX B I bus as their c o m m u n i c a t i o n l i n k t o c l usters. networks, a n d i n teractive users . W i t h i rs a b i l i ty t o c o n n ec t t o fo u r st: p a r a t c

VA,'CB! channels, t h e VAX 8 8 0 0 system i n rarric­ u l a r o ffe rs g r e a t fl e x i b i l i ty in c o n fi g u r i n g peri p h era l devi ces a n d i n terfaces . T h i s paper first d i scusses the c haracteristics of the system com m u n i cation buses i n the VAX 8800 system . Following that i s a d iscuss i o n o f the i n terface , cal led the NBJ adapter, l i n king the pri mary sys­ tem bus to the VAXlll i n putjou tput ( 1/0) bus. Figure I i I lustra res the various components of a VAX f\800 system .